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4 Replies and 1727 Views
Card Engine to SDK board schematic clarification 1727 4
Started by steve
My LH7A404-11 Card engine schematic shows CD_GND of U13&9114&93 going to J1B&9180&93. On the SDK, J1B&9180&93 is the RTCK, going to the JTAG J36&9111&93. The lines on both boards do match the schematics.
1. Is sharing the JTAG RTCK line with the CD_GND intended
2. I don't see the JTAG RTCK line going anywhere else on the SDK brd other than from J1B&9180&93 to J36&9111&93, so am unclear of your implementation. I'm sure U13 could care less about the JTAG line, so can I assume the LH...
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by steve 05 Jul 2006 01:51 PM |
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1 Replies and 1735 Views
glueless interface to lq043 possible with Ah404 SDK? 1735 1
Started by Deleted User
Hello. I will soon be ibtaining a ZOOM BlueStreak Ah404 Development Kit from Logic PD. this product does not come with an LCD panel or touch screen controller. but Logic OD sells ZOOM display kits. these are too expensive for our project and out of our reach.
However, we do have remnants and excesses of Sharp TFT LCD panels, one with an added touch screen controller and one without one. The one without the touch csreen controller operates on a 24 bit interface. The remaining operate on an 18 b...
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1735 |
by Deleted User29 Jun 2006 07:31 AM |
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1 Replies and 1766 Views
new CE BSp 1766 1
Started by Deleted User
Hello. Where is the new CE 5.0 BSP for the Sharp series
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1766 |
by Deleted User29 Jun 2006 07:21 AM |
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2 Replies and 1534 Views
boot problem. (already search other posts) 1534 2
Started by Deleted User
I cannot boot and connect to my development board.
It was after I install a new video card (matrox dual head) and updated the ethernet driver (VIA RHINE II).
It has been working for an year and a half. Same scripts, same everything.
The problem. I use teraterm to bring the nic up. Then, I download the image, and then boot. But now, the image boots, but it does not finish the process witht he PB 5.0.
The image initializes the screen, but it stops there. Just before Windows screen. Inside PB, ...
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1534 |
by Deleted User27 Jun 2006 01:06 PM |
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7 Replies and 1876 Views
WinCE50 and EVC compiling debug version of application 1876 7
Started by casner
I'm trying to make a debug version of my application. When I compile I get the following warnings:
Linking...
corelibc.lib(pegdmain.obj) : warning LNK4209: debugging information corrupt; recompile module; linking object as if no debug info
corelibc.lib(dllmain.obj) : warning LNK4209: debugging information corrupt; recompile module; linking object as if no debug info
corelibc.lib(crt0dat.obj) : warning LNK4209: debugging information corrupt; recompile module; linking object as if no debug info
...
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1876 |
by casner25 May 2006 01:44 PM |
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2 Replies and 2140 Views
PCMCIA support from LH7A404 CardEngine 2140 2
Started by Deleted User
I am considering this development system for a new project. Among other things, it will need to support PCMCIA 5V device cards. The specs mention PCMCIA signals being available, but the CF slot being 3V3 memory only.
Please advise what we need for PCMCIA support Hopefully someone has already solved this problem, if we can buy a built up adaptor of some sort for immediate evaluation, that would be excellent. Failing that, are any schematics availabe for a proven design
Thanks,
Rick
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2140 |
by Deleted User12 May 2006 09:40 AM |
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9 Replies and 1671 Views
Problem booting sample CE image 1671 9
Started by Deleted User
We recently bought the Zoom SDK board with the LH7A404 on it, and I'm having trouble booting the CE image (from the zip file called LH7A404_DEV_IMAGE_For_All_Other_PNs.zip). I can load the image into RAM ok, but when I start CE using the exec command I get the debug info on the terminal, then it just hangs and my display never comes up.
I found in the FAQ that one cause of this could be no CF card, and I do have one (it's what I load the image into RAM from) but I discovered that it seems to b...
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1671 |
by Deleted User04 May 2006 07:52 AM |
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2 Replies and 1806 Views
how to use usb gadget in linux 1806 2
Started by Deleted User
How can I make lpd7a404 as a u-disk by using it's usb device controller in linux.
My platform is lpd7a404-SDK/linux/BSP-sharpLH7-1.2.8. I want to make lpd7a404 as a u-disk,
so I can format or copy file from PC(OS:WinXP) to lpd7a404 via usb (PC is host, and lpd7a404-SDK is device).
I have configured linux's kernel with "usb gadget" & "usb file storage" support, like this:
USB Gadget Support
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_DEBUG_FILES=y
CONFIG_USB_GADGET_N...
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1806 |
by Abraham31 Mar 2006 02:51 PM |
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1 Replies and 1511 Views
using cross over cable with lh7a404 1511 1
Started by Deleted User
hi all
i would like to use crossover cable with lh7a404-11 sdk board.
i have gone through the guide.
it says open platform builder.
what is a platform builder.where it is located.
can anyone provide me more information regarding this and guide me to communicate with the board.
can any one help me how to add new sample application program.and run it.i have tried 'vi' command(to write a hello program) in cygwin but it says command not found.
thanks in advance
Jahnavi
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1511 |
by 22 Mar 2006 10:10 AM |
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1 Replies and 1660 Views
need help............... 1660 1
Started by Deleted User
I am working on sharp's LH7A404-11-6416 logic development kit.I need to port uClinux to this ARM platform.I am new to linux and ARM processers.
Is this platform already portedif so can you provide any link/information.
If not, can it be portedand if yes how can one do it.
how can i start with uClinuxi have gone through http://www.uClinux.org can you provide me some more sites...
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1660 |
by 01 Mar 2006 12:34 PM |
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3 Replies and 1765 Views
LH7A404 and CSTN LCD based on vxWorks winML 1765 3
Started by Deleted User
Hi,
I use a VGA, CSTN LCD to interface the LH7A404. Select the vxWorks as RTOS. Normally, the LCD image is right. But if I access the others memory such as flash, CPLD space, the image would show chaos.
The LCDframe buffer is in the SDRAM malloced by cacheDMAmalloc(). The SDRAM is bufferable and cacheble, and the flash or CPLD memory space is not bufferable and not cacheable.
I guess this problem is bus conflict, but the LH7A404's UG indicate the LCD AHB has priority to access the SDRA...
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by Deleted User25 Feb 2006 02:36 PM |
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1 Replies and 1680 Views
........no help available for this option yet???????????? 1680 1
Started by Deleted User
hello
i have installed fedora core1(2.4.22-1)......on my system
downloaded uCinux disribution20051110.
i need to use sharp logic development kit(lh7a404)........
this is what i did..
1)untar the distribution
2)cd uClinux-dist
3)make config
it asked to select a vendor........but no option is available
when i type arm(which is present in /vendors/config ) it say no option available for this option yet
what to do....
how to make it work.....
please help......
jahnavi
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1680 |
by 10 Feb 2006 10:36 AM |
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2 Replies and 1567 Views
Any kind souls in here willing to take a little time? 1567 2
Started by Deleted User
Hello. I am in the middle of aproject and am in need of some assistance.
I basically have two options:
1. Use an LH7A404 card engine.
2. Make my own card board, which would be better for me, but requires the kind assistance of one of the hardware engineers in here. This would be a greatful thing.
So, is 2 possible I would greatly appreciate just a few moments time and effort of one of thehardware engineers in here, in helping me clarify a few points on selecting components for the LH7A4...
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1567 |
by 09 Feb 2006 06:56 PM |
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8 Replies and 1640 Views
LH7A404 stays resetted after blanking flash!!! 1640 8
Started by Deleted User
This problem araised after accidentally erasing the Flash memory. We thought it was a Jtag problem (becasue we could communicate with the board), but now we are sure that's not the case.
Here's the situation:
When I measure voltage in the reset pin of the Jtag interface (that's directly connected to the reset of the microprocessor, and to a pin in the CPLD), I get 0.2 Volts! Since this input is asserted when set to a low state, we think that the microprocessor is reseted therefore not ...
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by Deleted User06 Feb 2006 12:02 PM |
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2 Replies and 1630 Views
physical address of the display frame buffer 1630 2
Started by Deleted User
The physical address of the displays frame buffer and the CLCDC's upper
panel frame buffer are sat to 0xC1C00000 in the registry. Is there
possible to change this to use the CPU's internal static onchip memory
at address 0xB0000000 - 0xB0014000
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1630 |
by Deleted User04 Feb 2006 03:55 AM |
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6 Replies and 1565 Views
Flash animation 1565 6
Started by Deleted User
Hi All,
I have the SDK running using the WinCE 5.0 sample binary on a display. Would like to eventually bring up flash animation. Full WinCE 5.0 comes with Media 9 Player. Has anyone tried to run animation on this SDK Trying to get an idea if its even possible before taking the next development steps.
This SDK is running a 200Mhz processor. Would the 266Mhz processor be needed Does Logic plan to release a card engine with the 266Mhz processor
Thanks for your help!
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1565 |
by 03 Feb 2006 06:25 PM |
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5 Replies and 1593 Views
About Fast Peripherals bus accsess Error using PCMCIA Card 1593 5
Started by hashimoto
Hi,everyone.
We are developing the network device using IEEE802.11x with PCMCIA Card.
Our app board has single slot PCMCIA and some devices(RTC , VOCODER LSI, etc...).
PCMCIA is mapped on the address space starting at 0x5000.0000,
Another devices that except PCMCIA is mapped based on 0x7300.0000 as Fast Peripherals area available for user.
The fast Peripherals devices has 16-bit wide bus data.
Wireless PCMCIA Card is controled by ORiNOCO driver Ver 0.11b and running the task alternately fast ...
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by hashimoto25 Jan 2006 04:08 AM |
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1 Replies and 1689 Views
Intergrate SPI devices with SSP port 1689 1
Started by schung
I am currently seeking to put an SPI flash part on the SSP port, and I am wondering if anyone can shed some light in this aspect.
I am running into a lot of issues with the TX FIFO and the RX FIFO of the CPU, and was curious to see if anyone has been successful in using SPI memories with the SSP port.
Thanks
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1689 |
by 13 Jan 2006 11:51 AM |
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3 Replies and 1672 Views
Problems with NAND 1672 3
Started by Deleted User
We had some problems designing a system with boot from NAND flash as stated in your schematics that came in pdf format with LPD7A404-11.
We are connecting as recommended in UserGuide LH7A404 from Sharp (page 83
Fig.4-3) using Address line A20 as ALE, A21 as CLE, I/O0..I/O7 (data0,...,data7).
The biggest problem arises when trying to connect NAND Flash Chip Enable:
in your schematics you are using PC6 as Memory Bank Selector (logic implemented in CPLD with a couple of OR Gates and nWE and nRE lin...
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1672 |
by 03 Jan 2006 10:26 AM |
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1 Replies and 1600 Views
Production programming howto. Serial bootload->LOLO->W 1600 1
Started by Deleted User
Things are completing and need to think more about how to perform the production programming.
I think the best would be to put the cpu in serial/uart boot mode, download a small bootloader that in turn will download lolo. Then let lolo take over download the CE image through ethernet. It would be nice to get rid of jtag downloading.
But, does there exist a ready-made serial bootloader somewhere that will accomplish this At least until things are stable enough and volume high enough that we wi...
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1600 |
by Deleted User22 Dec 2005 10:52 AM |