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Last Post 17 Apr 2005 08:20 PM by  ericn@logicpd.com
LoLo at F8000000 or FFE00000?
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warden
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Posts:


--
21 Mar 2005 09:16 AM
    Hello,

    Out of the box, my CF5475 eval board did not seem to have LoLo running on it--I set the baud rate to 115200 in dBug, executed go FF840000, and the board froze, with no response from the terminal program.

    So, I figure I need to flash LoLo--went to the d/l site and got the lolo_1.5.4_MCF5475.zip file. In it, I find the likely candidate 1000587_evb-dbug_lolo.srec. However, when I attempt to load the file (after typing the "dl 0x800000" command in dbug as in the Application note 257), I get the error:

    Invalid download address: 0x00000000

    OK, so I go back to the dowload site and grab the 1.5.1 version of the LoLo Zip file. I download the "lolo_1.5.1_MCF5475_10_ITX_0001_F_strip_.srec" file. File downloads OK., go 0xFFE40000 seems to work... Maybe it would have worked in the first place...

    My question: The Appnote 257 documentation says that dBUG and LoLo live the 0xF8000000 area; the memory map diagram I got with the board shows dBUG and LoLo living in the FFE00000 area. "mmap" from dBUG shows boot flash only from FFE00000-FFFFFFFF. Why the discrepancy, and how would I get the 1.5.4 version of LoLo to run? My eval board says "Rev A03". Thanks--
    Anonymous
    Posts:


    --
    21 Mar 2005 09:58 AM
    warden,

    Have you had a chance to go through this doc yet?

    http://www.logicpd.com/do...76/1000199_Rev_B.pdf

    Let me know and we can work from there.
    warden
    New Member
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    Posts:


    --
    21 Mar 2005 10:14 AM
    Hi Aaron,

    Yes, I did see that document--look at page 6, it says to burn LoLo at ff840000 but I don't believe my eval board has flash there, only from ffe00000-ffffffff.
    I was wondering why the discrepancy from 800000 to E00000?
    And will the 1.5.4 LoLo only run at FF840000 not FFE40000?

    Thank you!

    Dave Warden
    Anonymous
    Posts:


    --
    21 Mar 2005 10:34 AM
    Hi Dave,

    Can you tell me which revision Fire Engine you have? Did you buy this development kit or is it a pre-release system?

    Thanks,
    warden
    New Member
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    Posts:


    --
    21 Mar 2005 11:38 AM
    Aaron,

    It is REV A03, s/n 80000245

    Thanks,

    Dave Warden
    Anonymous
    Posts:


    --
    21 Mar 2005 02:26 PM
    Hi Dave,

    My guess is that there was a change between LoLo 1.5.1 and 1.5.4 in regards to where it resides in Flash. LoLo 1.5.4 is what currently ships on the Freescale Development Kits and ff840000 is where it starts from in flash. In the README for 1.5.4 we see this:

    Quote:
    Development Kits with these engines are shipped with dBUG in
    block zero and LoLo in block 1 of boot flash. BoLo is not shipped on kits.

    This version has uses a boot flash base of 0xff800000 and could not be used
    with Freescales's Updater tool when it was released.


    So I'm wondering if you have the latest version of dBUG, that might be why it's not working. You'll have to ping Freescale for more information regarding dBUG.

    However as indicated in your other post http://www.logicpd.com/su.../viewtopic.php?t=443 it seems that you want to use bolo/lolo instead of dBUG. The LoLo procedures doc that we've been discussing in this thread should supply you with enough information to make that happen.

    Please post back here if you have any more questions regarding this.

    Thank you,
    warden
    New Member
    New Member
    Posts:


    --
    21 Mar 2005 02:59 PM
    Hi Aaron,

    Where is the boot flash "supposed" to be on the CF5475 eval board? On my board, I have boot flash from FFE0:0000-FFFF:FFFF--so if the 1.5.4 LoLo or any subsequent LoLo wants to execute from F840:0000, I don't see how I could ever use it. Did Logic change the location of the 2meg of boot flash? How would a later version of dBUG solve this?

    Thanks--maybe I'm not asking the right questions. Also, specific answers to the questions in my other post would really help me, too.

    Dave Warden
    Anonymous
    Posts:


    --
    22 Mar 2005 10:30 AM
    Dave,

    In a nutshell, you need to go into LOLO and do a ‘load raw 0xFFE00000 <size>’ where <size> is the length of your image. This will take your image (no matter if it is an image for 0xFF800000 or 0xFFE00000), and load it into the current base (0xFFE00000) of flash. Then burn the image. Then reset the board. At this point the new memory map will be in effect by the new code.

    The source image must be a raw binary image. On our web site that we .srec files. You can use objcopy to convert the file into a .raw binary file.

    Freescale also has a “loader” on their web site that can be used to burn images into flash. I am not sure if this will have issues with the new memory map or not, but it may be another avenue.

    Also, DBUG may have capabilities to do this as well. However you would have to contact freescale for more information.

    Regards,
    warden
    New Member
    New Member
    Posts:


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    25 Mar 2005 08:47 AM
    I updated the dBUG software with the updater from the Freescale website. NOW, dBUG is running from FF80:0000 and not FFE0:0000 !!! The previous version of dBUG was dated July 2004, this is dated September.

    How did the address of the boot flash change? Also, now I cannot access the code flash at E000:0000 -- if I try to display it or write to it, dBUG hangs.

    Can you tell me why/how the boot flash address changed and why my code flash is no longer working?

    Thanks,

    Dave Warden
    ericn@logicpd.com
    New Member
    New Member
    Posts:


    --
    17 Apr 2005 08:20 PM
    Dave,

    DBug is written & maintained by Freescale, so I cannot offer any information on that. The LOLO boat loader is maintained by Logic, so I can offer any help with that.

    The the coldfire CSAR0 register selects where the boot flash resides in the memory map.
    The CSAR1 register selects where the user flash is located.
    The CSAR4 register selects where the ISA interface is mapped (when using the CPLD)
    The CSAR5 register selects where the compact flash interface is mapped (when using the CPLD)

    More information regarding chip selects & the coldfire memory map can be found in section 17.5.1 of the MCF5485 refrence manual:

    http://www.freescale.com/...manual/MCF5485RM.pdf

    Eric Nelson
    Logic Product Development
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