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Last Post 03 Apr 2007 04:10 AM by  OradFarez
Question about DDR signal routing
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OradFarez



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01 Apr 2007 06:06 PM
    Now that new schematics and gerber files have been posted, I noticed that the major change was to the DDR SDRAM signal interface. I was wondering if this huge change really helped signal integrity alot or was the best result from using production memory over the pre-production memory you were using before?

    The reason I ask is that the IMXLITE kit is great for prototyping, but I have to design my own board for production. Any chance you have links to good DDR RAM layout guidelines? I cannot find anything for the 1.8V mobile RAM yet!!

    kurtl@logicpd.com



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    02 Apr 2007 02:41 PM
    Routing changes were made to improve signal timing.

    DDR guidelines can be found from most DDR suppliers. Low power DDR routing is similar to 2.5V DDR, except the lower voltage reduces signal threshold margin so your traces must be matched closer depending on dielectric your are routing through.

    If you need help laying out your product, or want LPD to layout your project for you, please contact product.sales@logicpd.com for more information. LPD has a full service design group that can help you in design, layout, manufacturing, and packaging.

    -Kurt

    OradFarez



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    03 Apr 2007 04:10 AM
    Thanks for the information. I may have to consider help in routing the RAM by paying for engineering time to route that area of the board. I don't have access to software that can perform the kind of signal analysis that I am sure you have done on this board.

    Out of curiousity, what are the trace widths of those signals in the RAM area? This information gives me an idea of cost for board production as this area is likely going to set the limits for trace/space. Thanks!


    EDIT: Looking at the gerber files, it appears to be 4mil/4mil.
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