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Last Post 27 Sep 2004 10:44 AM by  rdubrawski
Port G GPIOs not just used for PCMCIA?
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rdubrawski
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26 Apr 2004 12:13 AM
    I am trying to utilize the GPIO pins on Port G for controlling some external peripherals.
    I have written a library to provide access to all GPIOs for this purpose.
    I also have written a PeekPoke utility to allow me to manipulate the internal peripheral registers of the A400 for test.
    We will not be using PCMCIA of CF devices on this platform and have not included the drivers in our environment.
    I enable Port G for GPIOs by setting the PCMCIACON register PCEN12 (bits 1 and 0) to zero. Further, for debugging, I ensured that the Port G GPIOS were set as inputs at this time.
    Once I have disabled PCMCIA, I then set the Port G pins to be outputs but initially all high.
    I can manipulate all of the 8 GPIO pins to be high with no ill effects. I can manipulate pins 0,3,4,5,6,7 to be either High or Low, but if I set G:1 or G:2 low, the touch screen stop functioning.
    I have looked at the schematics for both the card engine and development kit and can see no connection between these.
    Is there some use of the Port G pins for touch panel that I do not see?
    Since I only need 5 pins for my peripherals, I will plan to move all 5 signals to pins 3,4,5,6,7 for now.

    Rich
    mikea@logicpd.com
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    27 Sep 2004 09:58 AM
    Rich,
    This is a very old post and you are probably past this issue. I thought I would reply though for future users.
    Some of the singals from Port G go to the CPLD for PCMCIA control. The CPLD is expecting certain values from these lines, although when they are used as GPIO, the CPLD gets what it believes is PCMCIA control signals and locks up the system.
    We have implemented a fix for the CPLD code to disable these signals. The earliest version of the CPLD code is 3.7 that has this fix and it was released in July, 2004. There is now a bit in the CPLD "GPIO Direction Register" that must be set to 1 when using Port G and H as GPIO. This is bit 1 and is called GPACT in the CPLD GPIO Direction Register. On reset, it is default 0 which is the state when using the PCMCIA interface.
    Check out the IO Controller spec for more details.

    Thanks,
    Mike A.
    rdubrawski
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    27 Sep 2004 10:44 AM
    Thanks Michael, I saw exactly that when the 3.7 CPLD update came out. Prior to that I had adapted an limitted my GPIO use to the signals that did not cause problems.
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