Would anyone know the reason why when I peek and poke at the card engines control register at 0x54200000 under LOLO, I/m not able to clear the LAN power enable bit...

When I read back the registers value, I also see that bit 1 is sometimes set (no documentation I've seen refers to this bit as being of any use)...

I've only been able to download logics P/N: 70000015 I/O controller spec sheet (next to useless), and would like to know where I can get my hands on some detailed timing data, bit descriptions, blah, blah, blah...

The Macgraigor Jtag interface I'm using seems to properly toggle bit 0 in the card engine controller... So it could be that LOLO is clearing this bit on it's own and sometimes (for undocumented reasons) periodically sets bit 1

Pretty weird, huh...