You don't run ThreadX on top of LoLo. Instead, when ThreadX starts, you copy the exception and interrupt handlers over LoLo. On the 9520 the exception vector address is always located at address 0. So you can either copy over LoLo's vectors located in sdram, or setup his memory map to have another area (say internal sram) be located at address 0 and put his vectors there. I just wanted to make it clear that he cannot put the vectors at some arbitrary location and then set a register to point there, they have to be wherever he has mapped address 0 to be.
Aaron Stewart
Technical Support Engineer
Logic Product Development
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