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IRQ7 can be masked in the IMRL register bit 7. I think you may have Level 7 priority interrupts confused with IRQ7. Interupts set to Level 7 priority are non-maskable.
IRQ7 is fixed at interrupt level 7, so it is an NMI. The difference is that it can be disabled via the IMRL and EPIER, giving you a maskable non-maskable interrupt . However, the MCF5474 reference manual does not recommend doing this, as spurious interrupts may result.
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If IRQ7 was non-maskable there are a few ways one could work around the issue. You could clear EPIE7 while you don't want to accept the IRQ7 interrupt, or you could disable the input pin in the EPDDR.
But luckily, IRQ7 is maskable and you shouldn't have to treat it any different than any other external interupt.
Using EPIE7 is not recommended in the reference manual, as stated above. You could disable via EPDDR, although there are probably still windows of opportunity for spurious interrupts. Yeah, I know, we could just ignore the spurious interrupts. Bottom line is that it is problematic trying to use an NMI as a "maskable" interrupt, even if the hardware allows you to do so. I'm curious why LogicPD chose IRQ7 for PCI INTA - perhaps they don't want to remap the IRQ1-4 pins? Choosing IRQ7 might have been convenient from a hardware standpoint, but it adds extra burden on the firmware.
Thanks for your response.