Technical Discussion Group Forum

This forum is provided for user discussion. While Beacon EmbeddedWorks support staff and engineers participate, Beacon EmbeddedWorks does not guarantee the accuracy of all information within in the Technical Discussion Group (TDG).

The "Articles" forums provide brief Articles written by Beacon EmbeddedWorks engineers that address the most frequently asked technical questions.

To receive email notifications when updates are posted for a Beacon EmbeddedWorks product download, please subscribe to the TDG Forum of interest.

TDG Forum

PrevPrev Go to previous topic
NextNext Go to next topic
Last Post 15 Dec 2005 01:18 PM by  Anonymous
hooking exception vectors
 1 Replies
You are not authorized to post a reply.
Author Messages
New Member
New Member

05 Dec 2005 02:35 AM

    I am trying to set up my own IRQ handler - but it seems as if I lack vital LogicLoader info.

    It would seem as if LogicLoader relocates exceptions high (0xffff0000). IRQ is routed to 0xa00006c0. However, when I try to chain through this address, it never gets to my ISR.

    Having checjed further, I am pretty sure a Timer OS is generating the proper interrupt.

    - How do I chain exception vectors ?
    - Is there any further technical documentation regarding the lower-working of LogicLoader?

    I even went as far as enabling the Trace Buffer - but to no avail (and not being completly sure its been setup correctly, I would hasistate building on its indication of SWI exception occuring as soom at the trace buffer is enabled...)

    Thanks in advance for any help...

    15 Dec 2005 01:18 PM
    We would not reccomend chaining on our interrupt vector. We reccomend that customers load their image and use the exec command to start thier OS or application. This turns off the cache, interrupts, and the MMU prior to jumping to the OS or application startup code. The startup code should re-initialize all things relating to the MMU, cache, and interrupts before turning interrupts back on.
    You are not authorized to post a reply.