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Last Post 23 Oct 2008 08:01 AM by
PCi and edgeport-7 interrupt
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23 Oct 2008 08:01 AM
    The m54x5evb board uses edgeport-7 as one of the two PCI interrupts. The coldfire V4ECFUM table 2-2 states that this interrupt is not maskable using the interrupt priority mask in the status register. This creates heartburn when trying to support the board since some operating systems must mask off interrupts during critical code sections. Have there been any reports of problems supporting this and have there been any suggested solutions?

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