I am trying to use the PC-104 interface on the FireEngine.
There are SERIOUS design flaws with this interface, which I have
corrected. And, I have produced timing diagrams, documentation,
and CPLD source code to make this interface functional.

HOWEVER----

I am not able to program the Xilinx CPLD on the board, which controls
many of I/O devices (like the Compact FLASH, etc) and the
PC-104 connector.

I have tried programming the XC2C128 CPLD, using both a
Xilinx Parallel III pod, and also their newer USB pod (Model DLC9). Both
of these cables are known good, and have programmed hundreds
of other Xilinx devices. The connections to the LogicPD ColdFire
board have been checked by two other engineers (one is a Xilinx FAE!),
and all connections have been ohmed out, to verify correct connections.
All signals have been verified with a digital scope: everything
looks fine, no "shorted" or floating signals, all signals move
during testing, signal "noise" is well within limits.

When I start the Xilinx iMPACT programmer and "initialize the chain",
the Xilinx programmer immediately recognizes that there is only one
device on the chain, and correctly identifies it as a xc2c128. So
far, so good .... the JTAG interface seems to be functioning, or it
could not have read this data back.

However, if I try to do ANYTHING ELSE (blank check, erase,
program ...anything)....iMPACT immediatly fails, and prints the following
error message:

ERROR:iMPACT: 2129 Boundary-Scan test failed. Please check
tdi -> tdo connection between the cable and device: '1' ('xc2c128').
A problem ...... (etc).

WHY is this? What's the secret to programming this XC2C128
on the FireEngine?

By the way, I checked ... U31 (the CPLD Update Buffer) ...
has it's control lines HIGH (so it's tri-stated, and not interfering
with the JTAG pod.) So, why doesn't this work?

Has ANYBODY successfully programmed the Xilinx CPLD
on a FireEngine? If so, what's the secret to this?