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Last Post 22 Nov 2005 10:47 AM by  kurtl@logicpd.com
Exercising I2C from losh prompt
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GHlavenka
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18 Nov 2005 10:13 AM
    Using information from pages 26-14 and 26-15 of Freescale's MCF547x Reference Manual (Rev 2.1) I issue the following commands to losh:

    > losh> w /b 0x10008f20 0
    > losh> w /b 0x10008f08 0
    > losh> w /b 0x10008f20 0x0a
    > losh> w /b 0x10008f0c 0
    > losh> w /b 0x10008f08 0
    > losh> w /b 0x10008f20 1

    This should theoretically issue a STOP to all slaves and make sure the bus is idle.

    At this point, I dump the registers to see what state everything's in:
    > losh> x 0x10008f00 4
    > 0x10008f00 00000000 00000000 00000000 81000000

    This looks right; Transfer Complete (i.e. not in progress) and no ACK received. This is the default state of I2SR. Now I want to set up to write something to a slave:
    > losh> w /b 0x10008f04 0x10
    > losh> w /b 0x10008f00 0
    > losh> w /b 0x10008f08 0x80
    > losh> w /b 0x10008f08 0xb0

    Again I check the registers:
    > losh> x 0x10008f00 4
    > 0x10008f00 00000000 10000000 90000000 93000000

    Wha...?

    I wrote a b0 to I2ICR, but what stuck was a 90. Over in I2SR I find the reason: Arbitration lost.

    Who the double-hockey-sticks did I lose arbitration to? There's nobody on the bus except the CF and the RTC! Plus, I have a scope on SCL and SDA and they're both still high so nobody's talking anyway. (I see a burst of I2C data when losh starts up so I know the scope is on the right pins.) (losh has set the two bits in the I2C PAR for me so we're OK there too.)

    Is this normal behavior?

    Anyway, I bull on ahead and run through paragraph 26.5.1, thus:

    If IBB is set, 0x1000f80c will be =>0xa0 and it's not (it's 93, see above), so the bus is not busy.
    > losh> w /b 0x10008f08 0x10
    > losh> w /b 0x10008f08 0x20
    > losh> w /b 0x10008f10 0xa0

    0xa0 is the address of the EEPROM I will eventually put out there; even though it's not connected at the moment I should still see its address go out over the bus, but... no activity!

    So I'm missing something. What?
    kurtl@logicpd.com
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    18 Nov 2005 02:53 PM
    GHlavenka,

    Do you have the PAR_SDA and PARSCL bits set to 1? They must be set to enable I2C functionality on those pins.

    -Kurt
    GHlavenka
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    21 Nov 2005 04:16 PM
    When I read 0x10000a44 (PAR_FECI2CIRQ) I find it already contains 0xff so losh has set them up for me.
    kurtl@logicpd.com
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    22 Nov 2005 10:47 AM
    Section 26.5.1 reads:

    MCF_I2C_I2CR |= 0x10;
    MCF_I2C_I2CR |= 0x20;

    Your lolo commands set I2CR to 0x10, then to 0x20. So you've set the MTX bit while clearing the IEN bit. Then you set the MSTA bit and cleared the MTX bit.

    The correct thing to do would be to read the state of the I2CR register, then OR in the 0x10, and then OR in the 0x20. Assuming you have the IEN bit already set from your previous commands, you might do something like this:

    losh> w /b 0x10008f08 0x80
    losh> w /b 0x10008f08 0xB0
    losh> w /b 0x10008f10 0xa0

    Also if you are having specific issues like this with the I2C module, have you reported it to Freescale's TIC system? They are trained in supporting the Coldfire4 CPU and might have more answers for you than this discussion forum can provide.
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