Search

Technical Discussion Group Forum

This forum is provided for user discussion. While Logic PD support staff and engineers participate, Logic PD does not guarantee the accuracy of all information within in the Technical Discussion Group (TDG).

The "Articles" forums provide brief Articles written by Logic PD engineers that address the most frequently asked technical questions.

To receive email notifications when updates are posted for a Logic PD product download, please subscribe to the TDG Forum of interest.

PrevPrev Go to previous topic
NextNext Go to next topic
Last Post 29 Sep 2009 09:19 AM by  johnlongawa
CSPI Signals and Registers on LiteKit?
 4 Replies
Sort:
You are not authorized to post a reply.
Author Messages

andreas.b



New Member


Posts:
New Member


--
08 Jul 2009 06:46 AM
    Trying to get the touch to work on i.MX27 LiteKit. Apparently i.MX27ADS uses CSPI2 for the touch while LiteKit uses CSPI1. After a lot of googling, reading documentation and sourcecode I've still not managed to find where to put the necessary changes so are there anyone who has an idea I would be more than delighted to hear about it!

    johnlongawa



    New Member


    Posts:
    New Member


    --
    08 Jul 2009 02:35 PM
    Replace use of MX27_PIN_TOUT in mx27_ads.c and mx27_ads_gpio.c with MX27_PIN_USBH1_TXDP (or if you have an old SOM: MX27_PIN_SD1_D1). This ensures the right interrupt get used for the PMIC.

    Also, make sure the following are enabled in your kernel build configuration:

    CONFIG_ARCH_MXC
    CONFIG_MXC_PMIC
    CONFIG_MXC_PMIC_CHARDEV
    CONFIG_MXC_SPI_PMIC_CORE
    CONFIG_MXC_PMIC_MC13783
    CONFIG_MXC_MC13783_ADC
    CONFIG_INPUT_TOUCHSCREEN
    CONFIG_TOUCHSCREEN_MXC
    CONFIG_INPUT

    Good luck. It took me a while to get it going and it was quite a while ago so I don't remember much else.

    -john

    andreas.b



    New Member


    Posts:
    New Member


    --
    09 Jul 2009 02:17 AM
    Thanks a lot! Works like a charm

    andreas.b



    New Member


    Posts:
    New Member


    --
    24 Jul 2009 02:15 AM
    Hi John,
    Have you managed to get the USB and MMC/SD running on the litekit? I can't even find the documentation for ADS board anymore since Freescale has removed anything i.MX-related from their website so I'm having troubles to compare the two designs.

    johnlongawa



    New Member


    Posts:
    New Member


    --
    29 Sep 2009 09:19 AM
    I never tried getting USB running but I did get SD card support running.

    Here's how I got SD card support working
    ----------------------------------------

    Eliminated the following:
    pbc_card_bit
    mxc_card_detected
    currently reads the input at the CPLD from the card detect signal
    returns 0 if no card detected, non-zero if card detected

    mxc_card_state_changed -
    previously called from the expio interrupt handler
    references the pbc_card_bit table

    expio_unmask_irq (uses mxc_card_detected, updates pbc_card_bit table)
    expio_irq_chip
    mxc_expio_init
    expio_mask_irq

    Made sure these routines are enabled:
    gpio_sdhc_active
    gpio_sdhc_inactive
    sdhc_get_card_det_status
    sdhc_init_card_det

    Modified these gpio routines to work with Zoom:
    gpio_sdhc_active
    - turned off code dealing with pull-up enable
    - now enables the card detect pin as an input
    bpio_sdhc_inactive
    - now frees the card detect pin
    sdhc_init_card_det
    - now returns the IRQ number for PB22

    Enabled the following in zm27_defconfig:

    CONFIG_MMC
    CONFIG_MMC_BLOCK
    CONFIG_MMC_BLOCK_BOUNCE
    CONFIG_MMC_MXC

    Created a node:

    mknod -m 666 /dev/mmcblock0 b 179 0

    Used fdisk to inspect it:

    fdisk -l mmcblock0

    Created a node for minor device 1:

    mknod -m 666 /dev/mmcblock0p1 b 179 1
    mount -t vfat /dev/mmcblock0p1 /mnt

    MISCELLANEOUS NOTES

    ADS has two SDHC slots. SD1 is connected directly to the Soc

    Most signals on SD1 go directly to the Soc. The card detect
    input (pin 10 on the SDCH1 connector) goes to CPLD_SD1_DET.
    The write protect signal (pin 16) goes to CPLD_SD1_WP.

    The SD2 main signals go to the Soc (through jumpers - to select
    between SD and memory stick). The card detect and write protect
    signals go to CPLD_SD2_DET and CPLD_SD2_WP.

    The socked on the baseboard is called SD1 but its really
    connected to SD2 on the Soc. The card detect is connected
    to Soc pad G19 and the write protect input is connected to
    Soc pad H22.

    SDHC_CD G19 USBH1_SUSP PB22
    SDHC_WP H22 USBH1_RCV PB25 SLCDC1_DAT0

    The main purpose of the ADS code is to make sure that the card detect
    interrupt handlers get called when the card present/not-present
    status changes. It is a general approach that is used for all of the
    memory cards. The mxc mmc driver toggles the edge of the interrupt
    each time an insertion or removal occurs.

    The Zoom doesn't have the CPLD and therefore does not have the expio
    interrupt system. We shouldn't need to maintain any of this information.

    mxc_card_status
    this is set from the contents of the PBC_STAT1_REG
    it is set initially from within mxc_expio_init and
    then subsequently during the mxc_expio_irq_handler

    pbc_card_bit
    This is an array of card stat information for each of the four possible
    memory cards (3 SDHC and 1 memory stick). The CPLD has an interrupt mask
    clear register. Each memory card has separate bits for card inserted and
    card removed.

    The array has three members for each card:

    [0] a mask with a single bit in it representing the position of the
    card bit in the PBC_STAT1_REG status register.
    [1] a mask bit representing the IMR bit for the inserted interrupt
    [2] a mask bit representing the IMR bit for the removed interrupt

    mxc_card_detected
    checks the PBC_STAT1_REG bit corresponding to the card number and
    returns a non-zero value if the status bit is cleared (meaning a
    card is present, the signal is active low)

    mxc_card_state_changed
    this is called each time any expio interrupt occurs
    the main handler reads the PBC_STAT1_REG and the PBC_INTMASK_SET_REG
    register to know which expio interrupts are enabled
    it then passes the mask register, latest status and previous status
    to mxc_card_state changed
    the function determines which status bits have changed
    then for each card whose status bit has changed and either or both
    of its (insert and remove) interrupts are enabled, set the corresponding
    changed bit in the result to return

    mxc_expio_irq_handler
    mask the interrupt
    determine whether any card states have changed and combine this with
    other interrupts from the PBC_INTSTATUS_REG and dispatch the low-level
    handler for each interrupt that occurred.
    acknowledge and unmask the interrupt

    expio_mask_irq
    Disable an expio pin's interrupt by setting the bit in the imr

    expio_unmask_irq
    if this is a card interrupt, mask either the inserted interrupt or the
    removed interrupt bit for the card based on whether the card is currently
    inserted

    mxc_expio_ini
    get and validate the CPLD version
    read the initial status to get the card present status
    clear and mask the expio interrupts
    set the default level handler for each expio interrupt
    set the parent handler to mxc_expio_irq_handler

    [END]
    You are not authorized to post a reply.