+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+# CONFIG_CHR_DEV_SG is not set
+# CONFIG_CHR_DEV_SCH is not set
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+CONFIG_SCSI_MULTI_LUN=y
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+CONFIG_SCSI_LOWLEVEL=y
+# CONFIG_ISCSI_TCP is not set
+# CONFIG_SCSI_AHA152X is not set
+# CONFIG_SCSI_AIC7XXX_OLD is not set
+# CONFIG_SCSI_ADVANSYS is not set
+# CONFIG_SCSI_IN2000 is not set
+# CONFIG_SCSI_DTC3280 is not set
+# CONFIG_SCSI_FUTURE_DOMAIN is not set
+# CONFIG_SCSI_GENERIC_NCR5380 is not set
+# CONFIG_SCSI_GENERIC_NCR5380_MMIO is not set
+# CONFIG_SCSI_NCR53C406A is not set
+# CONFIG_SCSI_PAS16 is not set
+# CONFIG_SCSI_PSI240I is not set
+# CONFIG_SCSI_QLOGIC_FAS is not set
+# CONFIG_SCSI_SYM53C416 is not set
+# CONFIG_SCSI_T128 is not set
+# CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_LOWLEVEL_PCMCIA is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+CONFIG_NETDEVICES=y
+# CONFIG_NETDEVICES_MULTIQUEUE is not set
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+# CONFIG_ARCNET is not set
+# CONFIG_PHYLIB is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_AX88796 is not set
+# CONFIG_NET_VENDOR_3COM is not set
+# CONFIG_NET_VENDOR_SMC is not set
+# CONFIG_SMC91X is not set
+# CONFIG_DM9000 is not set
+# CONFIG_SMC911X is not set
+CONFIG_SMSC911X=y
+# CONFIG_NET_VENDOR_RACAL is not set
+# CONFIG_AT1700 is not set
+# CONFIG_DEPCA is not set
+# CONFIG_HP100 is not set
+# CONFIG_NET_ISA is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_NET_PCI is not set
+# CONFIG_B44 is not set
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+# CONFIG_TR is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET is not set
+# CONFIG_NET_PCMCIA is not set
+# CONFIG_WAN is not set
+CONFIG_PPP=m
+# CONFIG_PPP_MULTILINK is not set
+# CONFIG_PPP_FILTER is not set
+CONFIG_PPP_ASYNC=m
+CONFIG_PPP_SYNC_TTY=m
+CONFIG_PPP_DEFLATE=m
+# CONFIG_PPP_BSDCOMP is not set
+# CONFIG_PPP_MPPE is not set
+# CONFIG_PPPOE is not set
+# CONFIG_PPPOL2TP is not set
+# CONFIG_SLIP is not set
+CONFIG_SLHC=m
+# CONFIG_SHAPER is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+# CONFIG_KEYBOARD_ATKBD is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+CONFIG_KEYBOARD_MXC=y
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+# CONFIG_TOUCHSCREEN_ADS7846 is not set
+# CONFIG_TOUCHSCREEN_FUJITSU is not set
+# CONFIG_TOUCHSCREEN_GUNZE is not set
+# CONFIG_TOUCHSCREEN_ELO is not set
+# CONFIG_TOUCHSCREEN_MTOUCH is not set
+# CONFIG_TOUCHSCREEN_MK712 is not set
+CONFIG_TOUCHSCREEN_MXC=y
+# CONFIG_TOUCHSCREEN_PENMOUNT is not set
+# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
+# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
+# CONFIG_TOUCHSCREEN_UCB1400 is not set
+# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_MXC=y
+CONFIG_SERIAL_MXC_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_UNIX98_PTYS is not set
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_IPMI_HANDLER is not set
+CONFIG_HW_RANDOM=y
+# CONFIG_NVRAM is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+
+#
+# PCMCIA character devices
+#
+# CONFIG_SYNCLINK_CS is not set
+# CONFIG_CARDMAN_4000 is not set
+# CONFIG_CARDMAN_4040 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_DEVPORT=y
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_CHARDEV=y
+
+#
+# I2C Algorithms
+#
+# CONFIG_I2C_ALGOBIT is not set
+# CONFIG_I2C_ALGOPCF is not set
+# CONFIG_I2C_ALGOPCA is not set
+
+#
+# I2C Hardware Bus support
+#
+# CONFIG_I2C_ELEKTOR is not set
+CONFIG_I2C_MXC=y
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_STUB is not set
+# CONFIG_I2C_TINY_USB is not set
+# CONFIG_I2C_PCA_ISA is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_SENSORS_DS1337 is not set
+# CONFIG_SENSORS_DS1374 is not set
+# CONFIG_DS1682 is not set
+# CONFIG_SENSORS_EEPROM is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_SENSORS_PCA9539 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+
+#
+# SPI support
+#
+CONFIG_SPI=y
+CONFIG_SPI_MASTER=y
+
+#
+# SPI Master Controller Drivers
+#
+CONFIG_SPI_BITBANG=y
+CONFIG_SPI_MXC=y
+# CONFIG_SPI_MXC_TEST_LOOPBACK is not set
+# CONFIG_SPI_MXC_SELECT1 is not set
+CONFIG_SPI_MXC_SELECT2=y
+CONFIG_SPI_MXC_SELECT3=y
+
+#
+# SPI Protocol Masters
+#
+# CONFIG_SPI_AT25 is not set
+# CONFIG_SPI_SPIDEV is not set
+# CONFIG_SPI_TLE62X0 is not set
+CONFIG_W1=y
+CONFIG_W1_CON=y
+
+#
+# 1-wire Bus Masters
+#
+# CONFIG_W1_MASTER_DS2490 is not set
+# CONFIG_W1_MASTER_DS2482 is not set
+CONFIG_W1_MASTER_MXC=y
+# CONFIG_W1_MASTER_DS1WM is not set
+
+#
+# 1-wire Slaves
+#
+# CONFIG_W1_SLAVE_THERM is not set
+# CONFIG_W1_SLAVE_SMEM is not set
+# CONFIG_W1_SLAVE_DS2751 is not set
+CONFIG_W1_SLAVE_DS2433=y
+# CONFIG_W1_SLAVE_DS2433_CRC is not set
+# CONFIG_W1_SLAVE_DS2760 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+CONFIG_WATCHDOG=y
+CONFIG_WATCHDOG_NOWAYOUT=y
+
+#
+# Watchdog Device Drivers
+#
+# CONFIG_SOFT_WATCHDOG is not set
+CONFIG_MXC_WATCHDOG=y
+
+#
+# ISA-based Watchdog Cards
+#
+# CONFIG_PCWATCHDOG is not set
+# CONFIG_MIXCOMWD is not set
+# CONFIG_WDT is not set
+
+#
+# USB-based Watchdog Cards
+#
+# CONFIG_USBPCWATCHDOG is not set
+
+#
+# Sonics Silicon Backplane
+#
+CONFIG_SSB_POSSIBLE=y
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_SM501 is not set
+
+#
+# Multimedia devices
+#
+CONFIG_VIDEO_DEV=y
+CONFIG_VIDEO_V4L1=y
+CONFIG_VIDEO_V4L1_COMPAT=y
+CONFIG_VIDEO_V4L2=y
+# CONFIG_VIDEO_CAPTURE_DRIVERS is not set
+CONFIG_RADIO_ADAPTERS=y
+# CONFIG_RADIO_CADET is not set
+# CONFIG_RADIO_RTRACK is not set
+# CONFIG_RADIO_RTRACK2 is not set
+# CONFIG_RADIO_AZTECH is not set
+# CONFIG_RADIO_GEMTEK is not set
+# CONFIG_RADIO_SF16FMI is not set
+# CONFIG_RADIO_SF16FMR2 is not set
+# CONFIG_RADIO_TERRATEC is not set
+# CONFIG_RADIO_TRUST is not set
+# CONFIG_RADIO_TYPHOON is not set
+# CONFIG_RADIO_ZOLTRIX is not set
+# CONFIG_USB_DSBR is not set
+# CONFIG_DVB_CORE is not set
+CONFIG_DAB=y
+# CONFIG_USB_DABUSB is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+# CONFIG_MDA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+
+#
+# Sound
+#
+CONFIG_SOUND=y
+
+#
+# Advanced Linux Sound Architecture
+#
+CONFIG_SND=y
+CONFIG_SND_TIMER=y
+CONFIG_SND_PCM=y
+# CONFIG_SND_SEQUENCER is not set
+CONFIG_SND_OSSEMUL=y
+CONFIG_SND_MIXER_OSS=y
+CONFIG_SND_PCM_OSS=y
+CONFIG_SND_PCM_OSS_PLUGINS=y
+# CONFIG_SND_DYNAMIC_MINORS is not set
+CONFIG_SND_SUPPORT_OLD_API=y
+CONFIG_SND_VERBOSE_PROCFS=y
+# CONFIG_SND_VERBOSE_PRINTK is not set
+# CONFIG_SND_DEBUG is not set
+
+#
+# Generic devices
+#
+# CONFIG_SND_DUMMY is not set
+# CONFIG_SND_MTPAV is not set
+# CONFIG_SND_SERIAL_U16550 is not set
+# CONFIG_SND_MPU401 is not set
+
+#
+# ALSA ARM devices
+#
+# CONFIG_SND_MXC_SPDIF is not set
+CONFIG_SND_MXC_PMIC=y
+# CONFIG_SND_MXC_PLAYBACK_MIXING is not set
+# CONFIG_HEADSET_DETECT_ENABLE is not set
+
+#
+# SPI devices
+#
+
+#
+# USB devices
+#
+# CONFIG_SND_USB_AUDIO is not set
+# CONFIG_SND_USB_CAIAQ is not set
+
+#
+# PCMCIA devices
+#
+# CONFIG_SND_VXPOCKET is not set
+# CONFIG_SND_PDAUDIOCF is not set
+
+#
+# System on Chip audio support
+#
+# CONFIG_SND_SOC is not set
+
+#
+# SoC Audio support for SuperH
+#
+# CONFIG_SND_MXC_SOC is not set
+# CONFIG_SND_MXC_SOC_IRAM is not set
+# CONFIG_SND_SOC_IMX_3STACK_WM8350 is not set
+
+#
+# Open Sound System
+#
+# CONFIG_SOUND_PRIME is not set
+CONFIG_HID_SUPPORT=y
+CONFIG_HID=y
+# CONFIG_HID_DEBUG is not set
+# CONFIG_HIDRAW is not set
+
+#
+# USB Input Devices
+#
+CONFIG_USB_HID=m
+# CONFIG_USB_HIDINPUT_POWERBOOK is not set
+# CONFIG_HID_FF is not set
+# CONFIG_USB_HIDDEV is not set
+
+#
+# USB HID Boot Protocol drivers
+#
+# CONFIG_USB_KBD is not set
+# CONFIG_USB_MOUSE is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+# CONFIG_USB_ARCH_HAS_OHCI is not set
+CONFIG_USB_ARCH_HAS_EHCI=y
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+
+#
+# Miscellaneous USB options
+#
+CONFIG_USB_DEVICEFS=y
+CONFIG_USB_DEVICE_CLASS=y
+# CONFIG_USB_DYNAMIC_MINORS is not set
+CONFIG_USB_SUSPEND=y
+# CONFIG_USB_PERSIST is not set
+# CONFIG_USB_OTG is not set
+
+#
+# USB Host Controller Drivers
+#
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_ARC=y
+# CONFIG_USB_EHCI_ARC_H1 is not set
+CONFIG_USB_EHCI_ARC_H2=y
+CONFIG_USB_EHCI_ARC_OTG=y
+CONFIG_USB_EHCI_ARC_OTGHS=y
+# CONFIG_USB_EHCI_ARC_OTGFS is not set
+# CONFIG_USB_EHCI_SPLIT_ISO is not set
+CONFIG_USB_EHCI_ROOT_HUB_TT=y
+# CONFIG_USB_EHCI_TT_NEWSCHED is not set
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+
+#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+
+#
+# may also be needed; see USB_STORAGE Help for more information
+#
+CONFIG_USB_STORAGE=y
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_ISD200 is not set
+# CONFIG_USB_STORAGE_DPCM is not set
+# CONFIG_USB_STORAGE_USBAT is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_STORAGE_SDDR55 is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_STORAGE_KARMA is not set
+# CONFIG_USB_LIBUSUAL is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+CONFIG_USB_MON=y
+
+#
+# Belcarra USBLAN Networking for USB
+#
+# CONFIG_USB_USBLAN is not set
+
+#
+# USB port drivers
+#
+
+#
+# USB Serial Converter support
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_AUERSWALD is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_BERRY_CHARGE is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_PHIDGET is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_SISUSBVGA is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
+
+#
+# USB DSL modem support
+#
+
+#
+# USB Gadget Support
+#
+CONFIG_USB_GADGET=m
+# CONFIG_USB_GADGET_DEBUG_FILES is not set
+CONFIG_USB_GADGET_SELECTED=y
+# CONFIG_USB_GADGET_AMD5536UDC is not set
+# CONFIG_USB_GADGET_ATMEL_USBA is not set
+# CONFIG_USB_GADGET_FSL_USB2 is not set
+# CONFIG_USB_GADGET_NET2280 is not set
+# CONFIG_USB_GADGET_PXA2XX is not set
+# CONFIG_USB_GADGET_M66592 is not set
+# CONFIG_USB_GADGET_GOKU is not set
+# CONFIG_USB_GADGET_LH7A40X is not set
+# CONFIG_USB_GADGET_OMAP is not set
+CONFIG_USB_GADGET_ARC=y
+CONFIG_USB_ARC=m
+# CONFIG_USB_GADGET_S3C2410 is not set
+# CONFIG_USB_GADGET_AT91 is not set
+# CONFIG_USB_GADGET_DUMMY_HCD is not set
+CONFIG_USB_GADGET_DUALSPEED=y
+CONFIG_USB_GADGET_ARC_OTG=y
+# CONFIG_USB_GADGET_ARC_OTGFS is not set
+CONFIG_USB_GADGET_ARC_OTGHS=y
+# CONFIG_USB_ZERO is not set
+CONFIG_USB_ETH=m
+CONFIG_USB_ETH_RNDIS=y
+CONFIG_USB_GADGETFS=m
+CONFIG_USB_FILE_STORAGE=m
+# CONFIG_USB_FILE_STORAGE_TEST is not set
+CONFIG_USB_G_SERIAL=m
+# CONFIG_USB_MIDI_GADGET is not set
+
+#
+# On-The-Go and USB Peripheral Support
+#
+CONFIG_OTG=m
+
+#
+#
+#
+
+#
+# On-The-Go Support Platform Selection
+#
+# CONFIG_OTG_PLATFORM_USB is not set
+CONFIG_OTG_PLATFORM_USBD=y
+CONFIG_OTG_HIGH_SPEED_CAPABLE=y
+CONFIG_OTG_BTC_ARC=y
+CONFIG_OTG_IMX31ADS=m
+CONFIG_OTG_ARC=y
+# CONFIG_OTG_ARC_OTGHS is not set
+# CONFIG_OTG_ARC_OTGFS is not set
+
+#
+#
+#
+
+#
+# On-The-Go Options
+#
+CONFIG_OTG_USB_PERIPHERAL=y
+# CONFIG_OTG_USB_WIRED_DEVICE is not set
+# CONFIG_OTG_USB_PERIPHERAL_OR_HOST is not set
+# CONFIG_OTG_USB_WIRED_DEVICE_OR_HOST is not set
+# CONFIG_OTG_DEVICE is not set
+CONFIG_OTG_HIGH_SPEED=y
+CONFIG_OTG_SELF_POWERED=y
+CONFIG_OTG_BMAXPOWER=1
+CONFIG_OTG_TR_AUTO=y
+
+#
+#
+#
+
+#
+# Language
+#
+CONFIG_OTG_LANGID=0x0904
+
+#
+# Testing and Portability
+#
+# CONFIG_OTG_TRACE is not set
+# CONFIG_OTG_NOC99 is not set
+# CONFIG_OTG_INTERNAL_TESTING is not set
+
+#
+# Targeted Peripherals List (USB Peripheral Function Drivers)
+#
+
+#
+# OTG Generic function
+#
+CONFIG_OTG_GENERIC=m
+
+#
+# OTG Generic Composite function options
+#
+CONFIG_OTG_GENERIC_VENDORID=0x15ec
+CONFIG_OTG_GENERIC_PRODUCTID=0xf010
+CONFIG_OTG_GENERIC_BCDDEVICE=0x0100
+CONFIG_OTG_GENERIC_MANUFACTURER="Belcarra"
+CONFIG_OTG_GENERIC_PRODUCT_NAME="Generic Composite"
+CONFIG_OTG_GENERIC_CONFIG_NONE=y
+# CONFIG_OTG_GENERIC_CONFIG_MOUSE is not set
+# CONFIG_OTG_GENERIC_CONFIG_NET_EEM is not set
+# CONFIG_OTG_GENERIC_CONFIG_NET_BLAN is not set
+# CONFIG_OTG_GENERIC_CONFIG_NET_CDC is not set
+# CONFIG_OTG_GENERIC_CONFIG_NET_SAFE is not set
+# CONFIG_OTG_GENERIC_CONFIG_ACM_TTY is not set
+# CONFIG_OTG_GENERIC_CONFIG_MSC is not set
+# CONFIG_OTG_GENERIC_CONFIG_HID2_NON_IAD is not set
+# CONFIG_OTG_GENERIC_CONFIG_HID2 is not set
+# CONFIG_OTG_GENERIC_CONFIG_HID_MSC is not set
+CONFIG_OTG_GENERIC_PRODUCTID_CDCEEM=0xf001
+CONFIG_OTG_GENERIC_PRODUCTID_SERIAL=0xf002
+CONFIG_OTG_GENERIC_PRODUCTID_HID=0xf003
+CONFIG_OTG_GENERIC_PRODUCTID_MODEM=0xf004
+CONFIG_OTG_GENERIC_PRODUCTID_CDCECM=0xf005
+CONFIG_OTG_GENERIC_PRODUCTID_MASS=0xf006
+CONFIG_OTG_GENERIC_PRODUCTID_HID2_NON_IAD=0xc000
+CONFIG_OTG_GENERIC_PRODUCTID_HID2=0xc001
+CONFIG_OTG_GENERIC_PRODUCTID_HID_MSC=0xc002
+CONFIG_OTG_GENERIC_PRODUCTID_HID_BLAN=0xc003
+CONFIG_OTG_GENERIC_PRODUCTID_HID_SERIAL=0xc005
+CONFIG_OTG_GENERIC_PRODUCTID_HID_MODEM=0xc006
+
+#
+# OTG ACM Function
+#
+CONFIG_OTG_ACM=m
+
+#
+# OTG Random Mouse function
+#
+CONFIG_OTG_MOUSE=m
+
+#
+# Mouse support modules:
+#
+CONFIG_OTG_MOUSE_INTERFACE=y
+# CONFIG_OTG_MOUSE_COMPOSITE is not set
+# CONFIG_OTG_MOUSE_TRADITIONAL is not set
+
+#
+# OTG Random Mouse function options
+#
+CONFIG_OTG_MOUSE_VENDORID=0x15ec
+CONFIG_OTG_MOUSE_PRODUCTID=0xf003
+CONFIG_OTG_MOUSE_BCDDEVICE=0x0100
+CONFIG_OTG_MOUSE_MANUFACTURER="Belcarra"
+CONFIG_OTG_MOUSE_PRODUCT_NAME="Random Mouse Device"
+CONFIG_OTG_MOUSE_COMM_INTF="MOUSE Data Intf"
+CONFIG_OTG_MOUSE_DESC="MOUSE Configuration"
+# CONFIG_OTG_MOUSE_BH is not set
+CONFIG_OTG_MOUSE_PACKETS=10000
+# CONFIG_OTG_MOUSE_STALL is not set
+CONFIG_OTG_MOUSE_INTERVAL=1
+
+#
+# OTG Mass Storage function
+#
+CONFIG_OTG_MSC=m
+
+#
+# OTG Mass Storage function options
+#
+CONFIG_OTG_MSC_MANUFACTURER="Belcarra"
+CONFIG_OTG_MSC_PRODUCT_NAME="Mass Storage Class - Bulk Only"
+CONFIG_OTG_MSC_INTF="MSC BO Data Intf"
+
+#
+# OTG Network Function
+#
+CONFIG_OTG_NETWORK=m
+
+#
+# USBOTG Network Interface Function Driver options
+#
+
+#
+# --
+#
+
+#
+# Network Protocols
+#
+# CONFIG_OTG_NETWORK_EEM is not set
+# CONFIG_OTG_NETWORK_ECM is not set
+
+#
+# --
+#
+
+#
+# Older Network Protocols
+#
+CONFIG_OTG_NETWORK_DEPRECATED=y
+CONFIG_OTG_NETWORK_BLAN=y
+CONFIG_OTG_NETWORK_BLAN_CRC=y
+CONFIG_OTG_NETWORK_BLAN_AUTO_CONFIG=y
+# CONFIG_OTG_NETWORK_BLAN_NONBRIDGED is not set
+# CONFIG_OTG_NETWORK_SAFE is not set
+# CONFIG_OTG_NETWORK_BASIC is not set
+# CONFIG_OTG_NETWORK_BASIC2 is not set
+
+#
+# --
+#
+
+#
+# Linux Network Options)
+#
+# CONFIG_OTG_NETWORK_HOTPLUG is not set
+
+#
+# --
+#
+
+#
+# Network Device Type and Address configuration (testing)
+#
+CONFIG_MMC=y
+# CONFIG_MMC_DEBUG is not set
+# CONFIG_MMC_UNSAFE_RESUME is not set
+
+#
+# MMC/SD Card Drivers
+#
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_BLOCK_BOUNCE=y
+# CONFIG_SDIO_UART is not set
+
+#
+# MMC/SD Host Controller Drivers
+#
+# CONFIG_MMC_SPI is not set
+CONFIG_MMC_MXC=y
+CONFIG_MMC_IMX_ESDHCI=y
+# CONFIG_NEW_LEDS is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+
+#
+# SPI RTC drivers
+#
+# CONFIG_RTC_DRV_RS5C348 is not set
+# CONFIG_RTC_DRV_MAX6902 is not set
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+CONFIG_RTC_MXC=y
+# CONFIG_RTC_DRV_MXC_V2 is not set
+
+#
+# MXC support drivers
+#
+CONFIG_MXC_IPU=y
+CONFIG_MXC_IPU_V1=y
+CONFIG_MXC_IPU_PF=y
+
+#
+# MXC SSI support
+#
+CONFIG_MXC_SSI=y
+
+#
+# MXC Digital Audio Multiplexer support
+#
+CONFIG_MXC_DAM=y
+
+#
+# MXC PMIC support
+#
+CONFIG_MXC_SPI_PMIC_CORE=y
+# CONFIG_MXC_I2C_MCU_PMIC_CORE is not set
+CONFIG_MXC_PMIC=y
+CONFIG_MXC_PMIC_CHARDEV=y
+
+#
+# MXC PMIC Client Drivers
+#
+CONFIG_MXC_PMIC_MC13783=y
+CONFIG_MXC_MC13783_ADC=y
+CONFIG_MXC_MC13783_AUDIO=y
+CONFIG_MXC_MC13783_RTC=y
+CONFIG_MXC_MC13783_LIGHT=y
+CONFIG_MXC_MC13783_BATTERY=y
+CONFIG_MXC_MC13783_CONNECTIVITY=y
+CONFIG_MXC_MC13783_POWER=y
+
+#
+# Advanced Power Management devices
+#
+# CONFIG_MXC_DPTC is not set
+# CONFIG_MXC_DVFS is not set
+
+#
+# MXC Security Drivers
+#
+CONFIG_MXC_SECURITY_SCC=y
+# CONFIG_SCC_DEBUG is not set
+CONFIG_MXC_SECURITY_RNG=y
+# CONFIG_MXC_RNG_TEST_DRIVER is not set
+# CONFIG_MXC_RNG_DEBUG is not set
+CONFIG_MXC_SECURITY_RTIC=y
+# CONFIG_MXC_RTIC_TEST_DEBUG is not set
+CONFIG_MXC_SECURITY_CORE=y
+
+#
+# MXC MPEG4 Encoder Kernel module support
+#
+CONFIG_MXC_HMP4E=y
+# CONFIG_MXC_HMP4E_DEBUG is not set
+
+#
+# MXC HARDWARE EVENT
+#
+CONFIG_MXC_HWEVENT=y
+
+#
+# MXC VPU(Video Processing Unit) support
+#
+CONFIG_MXC_VPU=y
+# CONFIG_MXC_VPU_DEBUG is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_EXT4DEV_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+CONFIG_DNOTIFY=y
+# CONFIG_AUTOFS_FS is not set
+CONFIG_AUTOFS4_FS=m
+# CONFIG_FUSE_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+# CONFIG_JFFS2_LZO is not set
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+CONFIG_CRAMFS=y
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+# CONFIG_NFSD is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_BIND34 is not set
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+CONFIG_NLS_ASCII=m
+CONFIG_NLS_ISO8859_1=y
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+CONFIG_NLS_UTF8=m
+# CONFIG_DLM is not set
+CONFIG_INSTRUMENTATION=y
+CONFIG_PROFILING=y
+CONFIG_OPROFILE=y
+CONFIG_OPROFILE_ARMV6=y
+CONFIG_OPROFILE_ARM11_CORE=y
+CONFIG_OPROFILE_ARM11_EVTMON=y
+# CONFIG_MARKERS is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+# CONFIG_DEBUG_KERNEL is not set
+# CONFIG_DEBUG_BUGVERBOSE is not set
+CONFIG_FRAME_POINTER=y
+# CONFIG_SAMPLES is not set
+# CONFIG_DEBUG_USER is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+# CONFIG_CRYPTO is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_CRC_CCITT=m
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
diff -Naur PDK_BSP_R13.baseline/rpm/BUILD/linux/.config PDK_BSP_R13/rpm/BUILD/linux/.config
--- PDK_BSP_R13.baseline/rpm/BUILD/linux/.config 2008-08-19 07:00:35.000000000 -0700
+++ PDK_BSP_R13/rpm/BUILD/linux/.config 2008-08-26 10:40:24.000000000 -0700
@@ -53,7 +53,7 @@
CONFIG_SYSFS_DEPRECATED=y
# CONFIG_RELAY is not set
# CONFIG_BLK_DEV_INITRD is not set
-CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
CONFIG_SYSCTL=y
CONFIG_EMBEDDED=y
CONFIG_UID16=y
@@ -160,14 +160,15 @@
# CONFIG_ARCH_MX21 is not set
CONFIG_ARCH_MXC_HAS_NFC_V1=y
CONFIG_I2C_MXC_SELECT1=y
-# CONFIG_I2C_MXC_SELECT2 is not set
+CONFIG_I2C_MXC_SELECT2=y

#
# MX3 Options
#
-CONFIG_MACH_MX31ADS=y
+CONFIG_MACH_MX31LITE=y
+# CONFIG_MACH_MX31ADS is not set
# CONFIG_MACH_MX31_3DS is not set
-# CONFIG_MX3_DOZE_DURING_IDLE is not set
+CONFIG_MX3_DOZE_DURING_IDLE=y
CONFIG_MXC_SDMA_API=y

#
@@ -229,7 +230,6 @@
# CONFIG_I82365 is not set
# CONFIG_TCIC is not set
CONFIG_PCMCIA_PROBE=y
-CONFIG_PCMCIA_MX31ADS=m

#
# Kernel Features
@@ -365,56 +365,7 @@
#
# CONFIG_NET_PKTGEN is not set
# CONFIG_HAMRADIO is not set
-CONFIG_IRDA=m
-
-#
-# IrDA protocols
-#
-CONFIG_IRLAN=m
-CONFIG_IRNET=m
-CONFIG_IRCOMM=m
-# CONFIG_IRDA_ULTRA is not set
-
-#
-# IrDA options
-#
-CONFIG_IRDA_CACHE_LAST_LSAP=y
-CONFIG_IRDA_FAST_RR=y
-# CONFIG_IRDA_DEBUG is not set
-
-#
-# Infrared-port device drivers
-#
-
-#
-# SIR device drivers
-#
-CONFIG_IRTTY_SIR=m
-
-#
-# Dongle support
-#
-# CONFIG_DONGLE is not set
-# CONFIG_KINGSUN_DONGLE is not set
-# CONFIG_KSDAZZLE_DONGLE is not set
-# CONFIG_KS959_DONGLE is not set
-
-#
-# Old SIR device drivers
-#
-# CONFIG_IRPORT_SIR is not set
-
-#
-# Old Serial dongle support
-#
-
-#
-# FIR device drivers
-#
-# CONFIG_USB_IRDA is not set
-# CONFIG_SIGMATEL_FIR is not set
-# CONFIG_MCS_FIR is not set
-CONFIG_MXC_FIR=m
+# CONFIG_IRDA is not set
# CONFIG_BT is not set
# CONFIG_AF_RXRPC is not set

@@ -493,9 +444,9 @@
# CONFIG_MTD_CFI_I4 is not set
# CONFIG_MTD_CFI_I8 is not set
# CONFIG_MTD_OTP is not set
-# CONFIG_MTD_CFI_INTELEXT is not set
-CONFIG_MTD_CFI_AMDSTD=y
-# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_INTELEXT=y
+# CONFIG_MTD_CFI_AMDSTD is not set
+CONFIG_MTD_CFI_STAA=y
CONFIG_MTD_CFI_UTIL=y
CONFIG_MTD_RAM=y
# CONFIG_MTD_ROM is not set
@@ -564,10 +515,7 @@
# CONFIG_BLK_DEV_CRYPTOLOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_UB is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_COUNT=16
-CONFIG_BLK_DEV_RAM_SIZE=16384
-CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
+# CONFIG_BLK_DEV_RAM is not set
# CONFIG_CDROM_PKTCDVD is not set
# CONFIG_ATA_OVER_ETH is not set
CONFIG_MISC_DEVICES=y
@@ -629,14 +577,7 @@
# CONFIG_SCSI_T128 is not set
# CONFIG_SCSI_DEBUG is not set
# CONFIG_SCSI_LOWLEVEL_PCMCIA is not set
-CONFIG_ATA=m
-# CONFIG_ATA_NONSTANDARD is not set
-# CONFIG_PATA_LEGACY is not set
-# CONFIG_PATA_PCMCIA is not set
-# CONFIG_PATA_QDI is not set
-# CONFIG_PATA_WINBOND_VLB is not set
-# CONFIG_PATA_PLATFORM is not set
-CONFIG_PATA_FSL=m
+# CONFIG_ATA is not set
# CONFIG_MD is not set
CONFIG_NETDEVICES=y
# CONFIG_NETDEVICES_MULTIQUEUE is not set
@@ -656,7 +597,7 @@
# CONFIG_SMC91X is not set
# CONFIG_DM9000 is not set
# CONFIG_SMC911X is not set
-# CONFIG_SMSC911X is not set
+CONFIG_SMSC911X=y
# CONFIG_NET_VENDOR_RACAL is not set
# CONFIG_AT1700 is not set
# CONFIG_DEPCA is not set
@@ -666,11 +607,8 @@
# CONFIG_IBM_NEW_EMAC_RGMII is not set
# CONFIG_IBM_NEW_EMAC_TAH is not set
# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
-CONFIG_NET_PCI=y
-# CONFIG_AC3200 is not set
-# CONFIG_APRICOT is not set
+# CONFIG_NET_PCI is not set
# CONFIG_B44 is not set
-CONFIG_CS89x0=y
# CONFIG_NETDEV_1000 is not set
# CONFIG_NETDEV_10000 is not set
# CONFIG_TR is not set
@@ -689,15 +627,7 @@
# CONFIG_USB_PEGASUS is not set
# CONFIG_USB_RTL8150 is not set
# CONFIG_USB_USBNET is not set
-CONFIG_NET_PCMCIA=y
-# CONFIG_PCMCIA_3C589 is not set
-# CONFIG_PCMCIA_3C574 is not set
-# CONFIG_PCMCIA_FMVJ18X is not set
-CONFIG_PCMCIA_PCNET=m
-# CONFIG_PCMCIA_NMCLAN is not set
-# CONFIG_PCMCIA_SMC91C92 is not set
-# CONFIG_PCMCIA_XIRC2PS is not set
-# CONFIG_PCMCIA_AXNET is not set
+# CONFIG_NET_PCMCIA is not set
# CONFIG_WAN is not set
CONFIG_PPP=m
# CONFIG_PPP_MULTILINK is not set
@@ -779,16 +709,7 @@
#
# Serial drivers
#
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-# CONFIG_SERIAL_8250_CS is not set
-CONFIG_SERIAL_8250_NR_UARTS=2
-CONFIG_SERIAL_8250_RUNTIME_UARTS=2
-CONFIG_SERIAL_8250_EXTENDED=y
-# CONFIG_SERIAL_8250_MANY_PORTS is not set
-# CONFIG_SERIAL_8250_SHARE_IRQ is not set
-# CONFIG_SERIAL_8250_DETECT_IRQ is not set
-# CONFIG_SERIAL_8250_RSA is not set
+# CONFIG_SERIAL_8250 is not set

#
# Non-8250 serial port support
@@ -797,9 +718,8 @@
CONFIG_SERIAL_MXC_CONSOLE=y
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
-CONFIG_UNIX98_PTYS=y
-CONFIG_LEGACY_PTYS=y
-CONFIG_LEGACY_PTY_COUNT=256
+# CONFIG_UNIX98_PTYS is not set
+# CONFIG_LEGACY_PTYS is not set
# CONFIG_IPMI_HANDLER is not set
CONFIG_HW_RANDOM=y
# CONFIG_NVRAM is not set
@@ -870,7 +790,7 @@
# CONFIG_SPI_MXC_TEST_LOOPBACK is not set
# CONFIG_SPI_MXC_SELECT1 is not set
CONFIG_SPI_MXC_SELECT2=y
-# CONFIG_SPI_MXC_SELECT3 is not set
+CONFIG_SPI_MXC_SELECT3=y

#
# SPI Protocol Masters
@@ -939,48 +859,7 @@
CONFIG_VIDEO_V4L1=y
CONFIG_VIDEO_V4L1_COMPAT=y
CONFIG_VIDEO_V4L2=y
-CONFIG_VIDEO_CAPTURE_DRIVERS=y
-# CONFIG_VIDEO_ADV_DEBUG is not set
-CONFIG_VIDEO_HELPER_CHIPS_AUTO=y
-# CONFIG_VIDEO_VIVI is not set
-# CONFIG_VIDEO_PMS is not set
-CONFIG_VIDEO_MXC_CAMERA=y
-
-#
-# MXC Camera/V4L2 PRP Features support
-#
-CONFIG_VIDEO_MXC_IPU_CAMERA=y
-# CONFIG_MXC_CAMERA_MC521DA is not set
-CONFIG_MXC_CAMERA_MICRON111=y
-# CONFIG_MXC_CAMERA_OV2640 is not set
-CONFIG_MXC_IPU_PRP_VF_SDC=y
-CONFIG_MXC_IPU_PRP_ENC=y
-CONFIG_VIDEO_MXC_OUTPUT=y
-CONFIG_VIDEO_MXC_IPU_OUTPUT=y
-# CONFIG_VIDEO_MXC_OPL is not set
-# CONFIG_VIDEO_CPIA is not set
-# CONFIG_VIDEO_CPIA2 is not set
-# CONFIG_VIDEO_SAA5246A is not set
-# CONFIG_VIDEO_SAA5249 is not set
-# CONFIG_TUNER_3036 is not set
-CONFIG_V4L_USB_DRIVERS=y
-# CONFIG_VIDEO_PVRUSB2 is not set
-# CONFIG_VIDEO_EM28XX is not set
-# CONFIG_VIDEO_USBVISION is not set
-# CONFIG_USB_VICAM is not set
-# CONFIG_USB_IBMCAM is not set
-# CONFIG_USB_KONICAWC is not set
-# CONFIG_USB_QUICKCAM_MESSENGER is not set
-# CONFIG_USB_ET61X251 is not set
-# CONFIG_VIDEO_OVCAMCHIP is not set
-# CONFIG_USB_W9968CF is not set
-# CONFIG_USB_OV511 is not set
-# CONFIG_USB_SE401 is not set
-# CONFIG_USB_SN9C102 is not set
-# CONFIG_USB_STV680 is not set
-# CONFIG_USB_ZC0301 is not set
-# CONFIG_USB_PWC is not set
-# CONFIG_USB_ZR364XX is not set
+# CONFIG_VIDEO_CAPTURE_DRIVERS is not set
CONFIG_RADIO_ADAPTERS=y
# CONFIG_RADIO_CADET is not set
# CONFIG_RADIO_RTRACK is not set
@@ -1003,44 +882,8 @@
#
# CONFIG_VGASTATE is not set
# CONFIG_VIDEO_OUTPUT_CONTROL is not set
-CONFIG_FB=y
-# CONFIG_FIRMWARE_EDID is not set
-# CONFIG_FB_DDC is not set
-CONFIG_FB_CFB_FILLRECT=y
-CONFIG_FB_CFB_COPYAREA=y
-CONFIG_FB_CFB_IMAGEBLIT=y
-# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
-# CONFIG_FB_SYS_FILLRECT is not set
-# CONFIG_FB_SYS_COPYAREA is not set
-# CONFIG_FB_SYS_IMAGEBLIT is not set
-# CONFIG_FB_SYS_FOPS is not set
-CONFIG_FB_DEFERRED_IO=y
-# CONFIG_FB_SVGALIB is not set
-# CONFIG_FB_MACMODES is not set
-# CONFIG_FB_BACKLIGHT is not set
-# CONFIG_FB_MODE_HELPERS is not set
-# CONFIG_FB_TILEBLITTING is not set
-
-#
-# Frame buffer hardware drivers
-#
-CONFIG_FB_MXC=y
-CONFIG_FB_MXC_SYNC_PANEL=y
-# CONFIG_FB_MXC_EPSON_VGA_SYNC_PANEL is not set
-# CONFIG_FB_MXC_CLAA_WVGA_SYNC_PANEL is not set
-CONFIG_FB_MXC_TVOUT=y
-# CONFIG_FB_MXC_TVOUT_CH7024 is not set
-# CONFIG_FB_MXC_ASYNC_PANEL is not set
-# CONFIG_FB_UVESA is not set
-# CONFIG_FB_S1D13XXX is not set
-# CONFIG_FB_VIRTUAL is not set
-CONFIG_BACKLIGHT_LCD_SUPPORT=y
-# CONFIG_LCD_CLASS_DEVICE is not set
-CONFIG_BACKLIGHT_CLASS_DEVICE=y
-# CONFIG_BACKLIGHT_CORGI is not set
-CONFIG_BACKLIGHT_MXC=y
-CONFIG_BACKLIGHT_MXC_IPU=y
-CONFIG_BACKLIGHT_MXC_PMIC=y
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set

#
# Display device support
@@ -1053,16 +896,6 @@
# CONFIG_VGA_CONSOLE is not set
# CONFIG_MDA_CONSOLE is not set
CONFIG_DUMMY_CONSOLE=y
-CONFIG_FRAMEBUFFER_CONSOLE=y
-# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
-# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
-# CONFIG_FONTS is not set
-CONFIG_FONT_8x8=y
-CONFIG_FONT_8x16=y
-CONFIG_LOGO=y
-# CONFIG_LOGO_LINUX_MONO is not set
-# CONFIG_LOGO_LINUX_VGA16 is not set
-CONFIG_LOGO_LINUX_CLUT224=y

#
# Sound
@@ -1172,9 +1005,9 @@
#
# USB Host Controller Drivers
#
-CONFIG_USB_EHCI_HCD=m
+CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_ARC=y
-CONFIG_USB_EHCI_ARC_H1=y
+# CONFIG_USB_EHCI_ARC_H1 is not set
CONFIG_USB_EHCI_ARC_H2=y
CONFIG_USB_EHCI_ARC_OTG=y
CONFIG_USB_EHCI_ARC_OTGHS=y
@@ -1501,7 +1334,7 @@
#
# CONFIG_MMC_SPI is not set
CONFIG_MMC_MXC=y
-# CONFIG_MMC_IMX_ESDHCI is not set
+CONFIG_MMC_IMX_ESDHCI=y
# CONFIG_NEW_LEDS is not set
CONFIG_RTC_LIB=y
CONFIG_RTC_CLASS=y
diff -Naur PDK_BSP_R13.baseline/rpm/BUILD/linux/arch/arm/mach-mx3/board-mx31lite.h PDK_BSP_R13/rpm/BUILD/linux/arch/arm/mach-mx3/board-mx31lite.h
--- PDK_BSP_R13.baseline/rpm/BUILD/linux/arch/arm/mach-mx3/board-mx31lite.h 1969-12-31 16:00:00.000000000 -0800
+++ PDK_BSP_R13/rpm/BUILD/linux/arch/arm/mach-mx3/board-mx31lite.h 2008-08-26 08:44:33.000000000 -0700
@@ -0,0 +1,109 @@
+/*
+ * Copyright 2005-2008 Freescale Semiconductor, Inc. All Rights Reserved.
+ */
+
+/*
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#ifndef __ASM_ARCH_MXC_BOARD_MX31LITE_H__
+#define __ASM_ARCH_MXC_BOARD_MX31LITE_H__
+
+#ifdef CONFIG_MACH_MX31LITE
+/*!
+ * @defgroup BRDCFG_MX31 Board Configuration Options
+ * @ingroup MSL_MX31
+ */
+
+/*!
+ * @file mach-mx3/board-mx31lite.h
+ *
+ * @brief This file contains all the board level configuration options.
+ *
+ * It currently hold the options defined for MX31 LITEKIT Platform.
+ *
+ * @ingroup BRDCFG_MX31
+ */
+
+/*
+ * Include Files
+ */
+#include <asm/arch/mxc_uart.h>
+
+/*!
+ * @name MXC UART EVB board level configurations
+ */
+/*! @{ */
+/*!
+ * Specifies if the Irda transmit path is inverting
+ */
+#define MXC_IRDA_TX_INV 0
+/*!
+ * Specifies if the Irda receive path is inverting
+ */
+#define MXC_IRDA_RX_INV 0
+
+/* UART 1 configuration */
+/*!
+ * This define specifies if the UART port is configured to be in DTE or
+ * DCE mode. There exists a define like this for each UART port. Valid
+ * values that can be used are \b MODE_DTE or \b MODE_DCE.
+ */
+#define UART1_MODE MODE_DCE
+/*!
+ * This define specifies if the UART is to be used for IRDA. There exists a
+ * define like this for each UART port. Valid values that can be used are
+ * \b IRDA or \b NO_IRDA.
+ */
+#define UART1_IR NO_IRDA
+/*!
+ * This define is used to enable or disable a particular UART port. If
+ * disabled, the UART will not be registered in the file system and the user
+ * will not be able to access it. There exists a define like this for each UART
+ * port. Specify a value of 1 to enable the UART and 0 to disable it.
+ */
+#define UART1_ENABLED 1
+/*! @} */
+
+/* UART 2 configuration */
+#define UART2_MODE MODE_DTE
+#define UART2_IR NO_IRDA
+#define UART2_ENABLED 1
+
+/* UART 3 configuration */
+#define UART3_MODE MODE_DTE
+#define UART3_IR NO_IRDA
+#ifdef CONFIG_SPI_MXC_SELECT1 /* Don't create UART 3 if we create CSPI1 */
+#define UART3_ENABLED 0
+#else
+#define UART3_ENABLED 1
+#endif
+
+/* UART 4 configuration */
+#define UART4_MODE MODE_DTE
+#define UART4_IR NO_IRDA
+#define UART4_ENABLED 0 /* ATA and UARTD use the same signals */
+
+/* UART 5 configuration */
+#define UART5_MODE MODE_DTE
+#define UART5_IR NO_IRDA
+#ifdef CONFIG_USB_EHCI_ARC_H2
+#define UART5_ENABLED 0
+#else
+#define UART5_ENABLED 1
+#endif
+
+/*! This is I/O Base address used to access registers of SMSC9117 on MX31 litekit */
+#define SMC9117_INT IOMUX_TO_IRQ(MX31_PIN_SFS6)
+#define SMC9117_BASE_ADDRESS (CS4_BASE_ADDR)
+
+
+#define MXC_PMIC_INT_LINE IOMUX_TO_IRQ(MX31_PIN_GPIO1_3)
+
+#endif /* CONFIG_MACH_MX31LITE */
+#endif /* __ASM_ARCH_MXC_BOARD_MX31LITE_H__ */
diff -Naur PDK_BSP_R13.baseline/rpm/BUILD/linux/arch/arm/mach-mx3/Kconfig PDK_BSP_R13/rpm/BUILD/linux/arch/arm/mach-mx3/Kconfig
--- PDK_BSP_R13.baseline/rpm/BUILD/linux/arch/arm/mach-mx3/Kconfig 2008-08-18 15:43:26.000000000 -0700
+++ PDK_BSP_R13/rpm/BUILD/linux/arch/arm/mach-mx3/Kconfig 2008-08-26 06:58:24.000000000 -0700
@@ -1,6 +1,13 @@
menu "MX3 Options"
depends on ARCH_MX3

+config MACH_MX31LITE
+ bool "Support MX31LITE (logicpd lite kit) platforms"
+ default y
+ help
+ Include support for MX31LITE platform from logicpd. This includes
+ specific configurations for the board and its peripherals.
+
config MACH_MX31ADS
bool "Support MX31ADS platforms"
help
diff -Naur PDK_BSP_R13.baseline/rpm/BUILD/linux/arch/arm/mach-mx3/Makefile PDK_BSP_R13/rpm/BUILD/linux/arch/arm/mach-mx3/Makefile
--- PDK_BSP_R13.baseline/rpm/BUILD/linux/arch/arm/mach-mx3/Makefile 2008-08-18 15:43:26.000000000 -0700
+++ PDK_BSP_R13/rpm/BUILD/linux/arch/arm/mach-mx3/Makefile 2008-08-26 06:58:24.000000000 -0700
@@ -4,10 +4,11 @@

# Object file lists.

-obj-y := system.o iomux.o cpu.o mm.o clock.o usb.o dptc.o devices.o serial.o dma.o mxc_pm.o dvfs_v2.o
+obj-y := system.o iomux.o cpu.o mm.o clock.o usb.o dptc.o devices.o serial.o dma.o mxc_pm.o dvfs_v2.o
obj-$(CONFIG_MACH_MX31ADS) += mx31ads.o mx31ads_gpio.o
obj-$(CONFIG_MACH_MX31_3DS) += mx3_3stack.o mx3_3stack_gpio.o
+obj-$(CONFIG_MACH_MX31LITE) += mx31lite.o mx31lite_gpio.o

# power management
-obj-$(CONFIG_MXC_DVFS) += dvfs.o
+obj-$(CONFIG_MXC_DVFS) += dvfs.o
obj-$(CONFIG_PM) += pm.o
diff -Naur PDK_BSP_R13.baseline/rpm/BUILD/linux/arch/arm/mach-mx3/mx31lite.c PDK_BSP_R13/rpm/BUILD/linux/arch/arm/mach-mx3/mx31lite.c
--- PDK_BSP_R13.baseline/rpm/BUILD/linux/arch/arm/mach-mx3/mx31lite.c 1969-12-31 16:00:00.000000000 -0800
+++ PDK_BSP_R13/rpm/BUILD/linux/arch/arm/mach-mx3/mx31lite.c 2008-08-26 06:58:24.000000000 -0700
@@ -0,0 +1,730 @@
+/*
+ * Copyright (C) 2000 Deep Blue Solutions Ltd
+ * Copyright (C) 2002 Shane Nay (shane@minirl.com)
+ * Copyright 2005-2008 Freescale Semiconductor, Inc. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#include <linux/types.h>
+#include <linux/sched.h>
+#include <linux/interrupt.h>
+#include <linux/init.h>
+#include <linux/input.h>
+#include <linux/nodemask.h>
+#include <linux/clk.h>
+#include <linux/platform_device.h>
+#include <linux/fsl_devices.h>
+#include <linux/spi/spi.h>
+#if defined(CONFIG_MTD) || defined(CONFIG_MTD_MODULE)
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/map.h>
+#include <linux/mtd/partitions.h>
+
+#include <asm/mach/flash.h>
+#endif
+
+#include <asm/hardware.h>
+#include <asm/irq.h>
+#include <asm/setup.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/irq.h>
+#include <asm/mach/keypad.h>
+#include <asm/arch/common.h>
+#include <asm/arch/memory.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/mmc.h>
+#include <asm/arch/spba.h>
+
+#include "board-mx31lite.h"
+#include "crm_regs.h"
+#include "iomux.h"
+/*!
+ * @file mach-mx3/mx31lite.c
+ *
+ * @brief This file contains the board-specific initialization routines.
+ *
+ * @ingroup MSL_MX31
+ */
+
+extern void mxc_cpu_init(void) __init;
+extern void mx31lite_gpio_init(void) __init;
+extern void mxc_cpu_common_init(void);
+extern int mxc_clocks_init(void);
+extern void __init early_console_setup(char *);
+
+static void mxc_nop_release(struct device *dev)
+{
+ /* Nothing */
+}
+
+unsigned long board_get_ckih_rate(void)
+{
+ return 26000000;
+}
+
+#if defined(CONFIG_KEYBOARD_MXC) || defined(CONFIG_KEYBOARD_MXC_MODULE)
+
+/* Keypad keycodes for the EVB 8x8
+ * keypad. POWER and PTT keys don't generate
+ * any interrupts via this driver so they are
+ * not support. Change any keys as u like!
+ */
+static u16 keymapping[64] = {
+ KEY_SELECT, KEY_LEFT, KEY_DOWN, KEY_RIGHT,
+ KEY_UP, KEY_F12, KEY_END, KEY_BACK,
+ KEY_F1, KEY_SENDFILE, KEY_HOME, KEY_F6,
+ KEY_VOLUMEUP, KEY_F8, KEY_F9, KEY_F10,
+ KEY_3, KEY_2, KEY_1, KEY_4,
+ KEY_VOLUMEDOWN, KEY_7, KEY_5, KEY_6,
+ KEY_9, KEY_LEFTSHIFT, KEY_8, KEY_0,
+ KEY_KPASTERISK, KEY_RECORD, KEY_Q, KEY_W,
+ KEY_A, KEY_S, KEY_D, KEY_E,
+ KEY_F, KEY_R, KEY_T, KEY_Y,
+ KEY_TAB, KEY_F7, KEY_CAPSLOCK, KEY_Z,
+ KEY_X, KEY_C, KEY_V, KEY_G,
+ KEY_B, KEY_H, KEY_N, KEY_M,
+ KEY_J, KEY_K, KEY_U, KEY_I,
+ KEY_SPACE, KEY_F2, KEY_DOT, KEY_ENTER,
+ KEY_L, KEY_BACKSPACE, KEY_P, KEY_O,
+};
+
+static struct resource mxc_kpp_resources[] = {
+ [0] = {
+ .start = MXC_INT_KPP,
+ .end = MXC_INT_KPP,
+ .flags = IORESOURCE_IRQ,
+ }
+};
+
+static struct keypad_data evb_8_by_8_keypad = {
+ .rowmax = 8,
+ .colmax = 8,
+ .irq = MXC_INT_KPP,
+ .learning = 0,
+ .delay = 2,
+ .matrix = keymapping,
+};
+
+/* mxc keypad driver */
+static struct platform_device mxc_keypad_device = {
+ .name = "mxc_keypad",
+ .id = 0,
+ .num_resources = ARRAY_SIZE(mxc_kpp_resources),
+ .resource = mxc_kpp_resources,
+ .dev = {
+ .release = mxc_nop_release,
+ .platform_data = &evb_8_by_8_keypad,
+ },
+};
+
+static void mxc_init_keypad(void)
+{
+ (void)platform_device_register(&mxc_keypad_device);
+}
+#else
+static inline void mxc_init_keypad(void)
+{
+}
+#endif
+
+/* MTD NOR flash */
+
+#if defined(CONFIG_MTD_MXC) || defined(CONFIG_MTD_MXC_MODULE)
+
+static struct mtd_partition mxc_nor_partitions[] = {
+ {
+ .name = "Bootloader",
+ .size = 512 * 1024,
+ .offset = 0x00000000,
+ .mask_flags = MTD_WRITEABLE /* force read-only */
+ },
+ {
+ .name = "Kernel",
+ .size = MTDPART_SIZ_FULL,
+ .offset = MTDPART_OFS_APPEND,
+ .mask_flags = 0},
+};
+
+static struct flash_platform_data mxc_flash_data = {
+ .map_name = "cfi_probe",
+ .width = 2,
+ .parts = mxc_nor_partitions,
+ .nr_parts = ARRAY_SIZE(mxc_nor_partitions),
+};
+
+static struct resource mxc_flash_resource = {
+ .start = 0xa0000000,
+ .end = 0xa0000000 + 0x02000000 - 1,
+ .flags = IORESOURCE_MEM,
+
+};
+
+static struct platform_device mxc_nor_mtd_device = {
+ .name = "mxc_nor_flash",
+ .id = 0,
+ .dev = {
+ .release = mxc_nop_release,
+ .platform_data = &mxc_flash_data,
+ },
+ .num_resources = 1,
+ .resource = &mxc_flash_resource,
+};
+
+static void mxc_init_nor_mtd(void)
+{
+ (void)platform_device_register(&mxc_nor_mtd_device);
+}
+#else
+static void mxc_init_nor_mtd(void)
+{
+}
+#endif
+
+/* MTD NAND flash */
+
+#if defined(CONFIG_MTD_NAND_MXC) || defined(CONFIG_MTD_NAND_MXC_MODULE) \
+ || defined(CONFIG_MTD_NAND_MXC_V2) || defined(CONFIG_MTD_NAND_MXC_V2_MODULE)
+
+static struct mtd_partition mxc_nand_partitions[] = {
+ {
+ .name = "nand.rootfs",
+ .offset = 0x00000000,
+ .size = 42 * 1024 * 1024},
+ {
+ .name = "nand.userfs",
+ .offset = MTDPART_OFS_APPEND,
+ .size = 20 * 1024 * 1024},
+ {
+ .name = "nand.boot",
+ .offset = MTDPART_OFS_APPEND,
+ .size = MTDPART_SIZ_FULL},
+};
+
+static struct flash_platform_data mxc_nand_data = {
+ .parts = mxc_nand_partitions,
+ .nr_parts = ARRAY_SIZE(mxc_nand_partitions),
+ .width = 1,
+};
+
+static struct platform_device mxc_nand_mtd_device = {
+ .name = "mxc_nand_flash",
+ .id = 0,
+ .dev = {
+ .release = mxc_nop_release,
+ .platform_data = &mxc_nand_data,
+ },
+};
+
+static void mxc_init_nand_mtd(void)
+{
+ if (__raw_readl(MXC_CCM_RCSR) & MXC_CCM_RCSR_NF16B) {
+ mxc_nand_data.width = 2;
+ }
+ (void)platform_device_register(&mxc_nand_mtd_device);
+}
+#else
+static inline void mxc_init_nand_mtd(void)
+{
+}
+#endif
+
+static struct spi_board_info mxc_spi_board_info[] __initdata = {
+ {
+ .modalias = "pmic_spi",
+ .irq = IOMUX_TO_IRQ(MX31_PIN_GPIO1_3),
+ .max_speed_hz = 4000000,
+ .bus_num = 2,
+ .chip_select = 0,
+ },
+};
+
+/*smsc9117 device*/
+#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
+static struct resource smsc911x_resources[] = {
+ {
+ .start = SMC9117_BASE_ADDRESS,
+ .end = SMC9117_BASE_ADDRESS + 0x100,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .start = SMC9117_INT,
+ .end = SMC9117_INT,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+static struct platform_device smsc_lan9117_device = {
+ .name = "smsc911x",
+ .id = 0,
+ .dev = {
+ .release = mxc_nop_release,
+ },
+ .num_resources = ARRAY_SIZE(smsc911x_resources),
+ .resource = smsc911x_resources,
+};
+static void mxc_init_enet(void)
+{
+ mxc_request_iomux(MX31_PIN_SFS6, OUTPUTCONFIG_GPIO,
+ INPUTCONFIG_GPIO);
+ mxc_set_gpio_direction(MX31_PIN_SFS6, 1);
+
+ (void)platform_device_register(&smsc_lan9117_device);
+}
+#else
+static inline void mxc_init_enet(void)
+{
+}
+#endif
+
+// <><><> Todo: Decide whether this applies to litekit
+#if defined(CONFIG_FB_MXC_SYNC_PANEL) || defined(CONFIG_FB_MXC_SYNC_PANEL_MODULE)
+static const char fb_default_mode[] = "Sharp-QVGA";
+
+/* mxc lcd driver */
+static struct platform_device mxc_fb_device = {
+ .name = "mxc_sdc_fb",
+ .id = 0,
+ .dev = {
+ .release = mxc_nop_release,
+ .platform_data = &fb_default_mode,
+ .coherent_dma_mask = 0xFFFFFFFF,
+ },
+};
+
+static void mxc_init_fb(void)
+{
+ (void)platform_device_register(&mxc_fb_device);
+}
+#else
+static inline void mxc_init_fb(void)
+{
+}
+#endif
+
+#if defined(CONFIG_BACKLIGHT_MXC)
+static struct platform_device mxcbl_devices[] = {
+#if defined(CONFIG_BACKLIGHT_MXC_PMIC) || defined(CONFIG_BACKLIGHT_MXC_PMIC_MODULE)
+ {
+ .name = "mxc_pmic_bl",
+ .id = 0,
+ .dev = {
+ .platform_data = (void *)-1, /* DISP # for this backlight */
+ },
+ },
+ {
+ .name = "mxc_pmic_bl",
+ .id = 1,
+ .dev = {
+ .platform_data = (void *)0, /* DISP # for this backlight */
+ },
+ },
+#endif
+#if defined(CONFIG_BACKLIGHT_MXC_IPU) || defined(CONFIG_BACKLIGHT_MXC_IPU_MODULE)
+ {
+ .name = "mxc_ipu_bl",
+ .id = 0,
+ .dev = {
+ .platform_data = (void *)3, /* DISP # for this backlight */
+ },
+ },
+#endif
+};
+static inline void mxc_init_bl(void)
+{
+ int i;
+ for (i = 0; i < ARRAY_SIZE(mxcbl_devices); i++) {
+ platform_device_register(&mxcbl_devices[i]);
+ }
+}
+#else
+static inline void mxc_init_bl(void)
+{
+}
+#endif
+
+// <><><> Todo: Decide whether this applies to litekit
+#if defined(CONFIG_MXC_FIR) || defined(CONFIG_MXC_FIR_MODULE)
+/*!
+ * Resource definition for the FIR
+ */
+static struct resource mxcir_resources[] = {
+ [0] = {
+ .start = UART2_BASE_ADDR,
+ .end = UART2_BASE_ADDR + SZ_16K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = MXC_INT_UART2,
+ .end = MXC_INT_UART2,
+ .flags = IORESOURCE_IRQ,
+ },
+ [2] = {
+ .start = FIRI_BASE_ADDR,
+ .end = FIRI_BASE_ADDR + SZ_16K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [3] = {
+ .start = MXC_INT_FIRI,
+ .end = MXC_INT_FIRI,
+ .flags = IORESOURCE_IRQ,
+ },
+ [4] = {
+ .start = MXC_INT_UART2,
+ .end = MXC_INT_UART2,
+ .flags = IORESOURCE_IRQ,
+ }
+};
+
+static struct mxc_ir_platform_data ir_data = {
+ .uart_ir_mux = 1,
+ .ir_rx_invert = MXC_IRDA_RX_INV,
+ .ir_tx_invert = MXC_IRDA_TX_INV,
+};
+
+/*! Device Definition for MXC FIR */
+static struct platform_device mxcir_device = {
+ .name = "mxcir",
+ .id = 0,
+ .dev = {
+ .release = mxc_nop_release,
+ .platform_data = &ir_data,
+ },
+ .num_resources = ARRAY_SIZE(mxcir_resources),
+ .resource = mxcir_resources,
+};
+
+static inline void mxc_init_ir(void)
+{
+ ir_data.uart_clk = clk_get(NULL, "uart_clk.1");;
+ (void)platform_device_register(&mxcir_device);
+}
+#else
+static inline void mxc_init_ir(void)
+{
+}
+#endif
+
+/* MMC device data */
+#if defined(CONFIG_MMC_MXC) || defined(CONFIG_MMC_MXC_MODULE)
+extern unsigned int sdhc_get_card_det_status(struct device *dev);
+extern int sdhc_init_card_det(int id);
+extern int sdhc_get_write_protect(void);
+
+static struct mxc_mmc_platform_data mmc0_data = {
+ .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29 | MMC_VDD_29_30,
+ .min_clk = 150000,
+ .max_clk = 25000000,
+ .card_inserted_state = 1,
+ .status = sdhc_get_card_det_status,
+ .wp_status = sdhc_get_write_protect,
+ .power_mmc = "VMMC2",
+};
+
+/*!
+ * Resource definition for the SDHC1
+ */
+static struct resource mxcsdhc1_resources[] = {
+ [0] = {
+ .start = MMC_SDHC1_BASE_ADDR,
+ .end = MMC_SDHC1_BASE_ADDR + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = MXC_INT_MMC_SDHC1,
+ .end = MXC_INT_MMC_SDHC1,
+ .flags = IORESOURCE_IRQ,
+ },
+ [2] = {
+ .start = 0,
+ .end = 0,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+/*! Device Definition for MXC SDHC1 */
+static struct platform_device mxcsdhc1_device = {
+ .name = "mxcmci",
+ .id = 0,
+ .dev = {
+ .release = mxc_nop_release,
+ .platform_data = &mmc0_data,
+ },
+ .num_resources = ARRAY_SIZE(mxcsdhc1_resources),
+ .resource = mxcsdhc1_resources,
+};
+
+static inline void mxc_init_mmc(void)
+{
+ int cd_irq;
+
+ cd_irq = sdhc_init_card_det(0);
+ if (cd_irq) {
+ mxcsdhc1_device.resource[2].start = cd_irq;
+ mxcsdhc1_device.resource[2].end = cd_irq;
+ }
+
+ spba_take_ownership(SPBA_SDHC1, SPBA_MASTER_A | SPBA_MASTER_C);
+ (void)platform_device_register(&mxcsdhc1_device);
+}
+#else
+static inline void mxc_init_mmc(void)
+{
+}
+#endif
+
+/*!
+ * Board specific fixup function. It is called by \b setup_arch() in
+ * setup.c file very early on during kernel starts. It allows the user to
+ * statically fill in the proper values for the passed-in parameters. None of
+ * the parameters is used currently.
+ *
+ * @param desc pointer to \b struct \b machine_desc
+ * @param tags pointer to \b struct \b tag
+ * @param cmdline pointer to the command line
+ * @param mi pointer to \b struct \b meminfo
+ */
+static void __init fixup_mxc_board(struct machine_desc *desc, struct tag *tags,
+ char **cmdline, struct meminfo *mi)
+{
+ mxc_cpu_init();
+}
+
+#if (defined(CONFIG_MXC_PMIC_MC13783) || \
+ defined(CONFIG_MXC_PMIC_MC13783_MODULE)) \
+ && (defined(CONFIG_SND_MXC_PMIC) || defined(CONFIG_SND_MXC_PMIC_MODULE))
+extern void gpio_activate_audio_ports(void);
+
+static void __init mxc_init_pmic_audio(void)
+{
+ struct clk *ckih_clk;
+ struct clk *cko_clk;
+
+ /* Enable 26 mhz clock on CKO1 for PMIC audio */
+ ckih_clk = clk_get(NULL, "ckih");
+ cko_clk = clk_get(NULL, "cko1_clk");
+ if (IS_ERR(ckih_clk) || IS_ERR(cko_clk)) {
+ printk(KERN_ERR "Unable to set CKO1 output to CKIH\n");
+ } else {
+ clk_set_parent(cko_clk, ckih_clk);
+ clk_set_rate(cko_clk, clk_get_rate(ckih_clk));
+ clk_enable(cko_clk);
+ }
+ clk_put(ckih_clk);
+ clk_put(cko_clk);
+
+ gpio_activate_audio_ports();
+}
+#else
+static void __inline mxc_init_pmic_audio(void)
+{
+}
+#endif
+
+/* IDE device data */
+#if defined(CONFIG_BLK_DEV_IDE_MXC) || defined(CONFIG_BLK_DEV_IDE_MXC_MODULE)
+
+/*! Platform Data for MXC IDE */
+static struct mxc_ide_platform_data mxc_ide_data = {
+ .power_drive = NULL,
+ .power_io = NULL,
+};
+
+static struct platform_device mxc_ide_device = {
+ .name = "mxc_ide",
+ .id = 0,
+ .dev = {
+ .release = mxc_nop_release,
+ .platform_data = &mxc_ide_data,
+ },
+};
+
+static inline void mxc_init_ide(void)
+{
+ if (platform_device_register(&mxc_ide_device) < 0)
+ printk(KERN_ERR "Error: Registering the ide.\n");
+}
+#else
+static inline void mxc_init_ide(void)
+{
+}
+#endif
+
+#if defined(CONFIG_PATA_FSL) || defined(CONFIG_PATA_FSL_MODULE)
+extern void gpio_ata_active(void);
+extern void gpio_ata_inactive(void);
+
+static int ata_init(struct platform_device *pdev)
+{
+ /* Configure the pins */
+ gpio_ata_active();
+
+ return 0;
+}
+
+static void ata_exit(void)
+{
+ /* Free the pins */
+ gpio_ata_inactive();
+}
+
+static struct fsl_ata_platform_data ata_data = {
+ .udma_mask = 0x0F, /* board can handle up to UDMA3 */
+ .fifo_alarm = MXC_IDE_DMA_WATERMARK / 2,
+ .max_sg = MXC_IDE_DMA_BD_NR,
+ .init = ata_init,
+ .exit = ata_exit,
+ .core_reg = NULL, /*"LDO2", */
+ .io_reg = NULL, /*"LDO3", */
+};
+
+static struct resource pata_fsl_resources[] = {
+ [0] = { /* I/O */
+ .start = ATA_BASE_ADDR + 0x00,
+ .end = ATA_BASE_ADDR + 0xD8,
+ .flags = IORESOURCE_MEM,
+ },
+ [2] = { /* IRQ */
+ .start = MXC_INT_ATA,
+ .end = MXC_INT_ATA,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct platform_device pata_fsl_device = {
+ .name = "pata_fsl",
+ .id = -1,
+ .num_resources = ARRAY_SIZE(pata_fsl_resources),
+ .resource = pata_fsl_resources,
+ .dev = {
+ .platform_data = &ata_data,
+ .coherent_dma_mask = ~0,
+ },
+};
+
+static void __init mxc_init_pata(void)
+{
+ (void)platform_device_register(&pata_fsl_device);
+}
+#else /* CONFIG_PATA_FSL */
+static void __init mxc_init_pata(void)
+{
+}
+#endif /* CONFIG_PATA_FSL */
+
+#define PLL_PCTL_REG(pd, mfd, mfi, mfn) \
+ ((((pd) - 1) << MXC_CCM_PCTL_PD_OFFSET) | \
+ (((mfd) - 1) << MXC_CCM_PCTL_MFD_OFFSET) | \
+ ((mfi) << MXC_CCM_PCTL_MFI_OFFSET) | \
+ mfn)
+
+/* For 26MHz input clock */
+#define PLL_532MHZ PLL_PCTL_REG(1, 13, 10, 3)
+#define PLL_399MHZ PLL_PCTL_REG(1, 52, 7, 35)
+#define PLL_133MHZ PLL_PCTL_REG(2, 26, 5, 3)
+
+/* For 27MHz input clock */
+#define PLL_532_8MHZ PLL_PCTL_REG(1, 15, 9, 13)
+#define PLL_399_6MHZ PLL_PCTL_REG(1, 18, 7, 7)
+#define PLL_133_2MHZ PLL_PCTL_REG(3, 5, 7, 2)
+
+#define PDR0_REG(mcu, max, hsp, ipg, nfc) \
+ (MXC_CCM_PDR0_MCU_DIV_##mcu | MXC_CCM_PDR0_MAX_DIV_##max | \
+ MXC_CCM_PDR0_HSP_DIV_##hsp | MXC_CCM_PDR0_IPG_DIV_##ipg | \
+ MXC_CCM_PDR0_NFC_DIV_##nfc)
+
+/*!
+ * Board specific initialization.
+ */
+static void __init mxc_board_init(void)
+{
+ // Set the PDR0 & MPCTL registers for 532MHz prior to initializing the clocks
+ __raw_writel(PDR0_REG(1, 4, 4, 2, 6), MXC_CCM_PDR0);
+ __raw_writel(PLL_532MHZ, MXC_CCM_MPCTL);
+
+ mxc_cpu_common_init();
+
+ /* Set the USB PLL */
+ __raw_writel(PLL_PCTL_REG(2, 988, 9, 228), MXC_CCM_UPCTL);
+
+ mxc_clocks_init();
+ early_console_setup(saved_command_line);
+ mxc_init_pmic_audio();
+ mxc_gpio_init();
+ mx31lite_gpio_init();
+ mxc_init_keypad();
+ mxc_init_enet();
+ mxc_init_nor_mtd();
+ mxc_init_nand_mtd();
+
+ spi_register_board_info(mxc_spi_board_info,
+ ARRAY_SIZE(mxc_spi_board_info));
+
+ mxc_init_fb();
+ mxc_init_bl();
+ /* FIR not supported on Litekit */
+ //mxc_init_ir();
+ mxc_init_mmc();
+ mxc_init_ide();
+ mxc_init_pata();
+}
+
+/* working point(wp): 0 - 133MHz; 1 - 266MHz; 2 - 399MHz; 3 - 532MHz */
+/* 26MHz input clock table */
+static struct cpu_wp cpu_wp_26[] = {
+ {
+ .pll_reg = PLL_532MHZ,
+ .pll_rate = 532000000,
+ .cpu_rate = 133000000,
+ .pdr0_reg = PDR0_REG(4, 4, 4, 2, 6),},
+ {
+ .pll_reg = PLL_532MHZ,
+ .pll_rate = 532000000,
+ .cpu_rate = 266000000,
+ .pdr0_reg = PDR0_REG(2, 4, 4, 2, 6),},
+ {
+ .pll_reg = PLL_399MHZ,
+ .pll_rate = 399000000,
+ .cpu_rate = 399000000,
+ .pdr0_reg = PDR0_REG(1, 3, 3, 2, 6),},
+ {
+ .pll_reg = PLL_532MHZ,
+ .pll_rate = 532000000,
+ .cpu_rate = 532000000,
+ .pdr0_reg = PDR0_REG(1, 4, 4, 2, 6),},
+};
+
+struct cpu_wp *get_cpu_wp(int *wp)
+{
+ *wp = 4;
+ return cpu_wp_26;
+}
+
+/*
+ * The following uses standard kernel macros defined in arch.h in order to
+ * initialize __mach_desc_MX31LITE data structure.
+ */
+/* *INDENT-OFF* */
+MACHINE_START(MX31LITE, "LogicPD MX31 LITEKIT")
+ /* Maintainer: (Modified from) Freescale Semiconductor, Inc. */
+ .phys_io = AIPS1_BASE_ADDR,
+ .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
+ .boot_params = PHYS_OFFSET + 0x100,
+ .fixup = fixup_mxc_board,
+ .map_io = mxc_map_io,
+ .init_irq = mxc_init_irq,
+ .init_machine = mxc_board_init,
+ .timer = &mxc_timer,
+MACHINE_END

diff -Naur PDK_BSP_R13.baseline/rpm/BUILD/linux/arch/arm/mach-mx3/mx31lite_gpio.c PDK_BSP_R13/rpm/BUILD/linux/arch/arm/mach-mx3/mx31lite_gpio.c
--- PDK_BSP_R13.baseline/rpm/BUILD/linux/arch/arm/mach-mx3/mx31lite_gpio.c 1969-12-31 16:00:00.000000000 -0800
+++ PDK_BSP_R13/rpm/BUILD/linux/arch/arm/mach-mx3/mx31lite_gpio.c 2008-08-26 08:58:45.000000000 -0700
@@ -0,0 +1,1152 @@
+/*
+ * Copyright 2005-2008 Freescale Semiconductor, Inc. All Rights Reserved.
+ */
+
+/*
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#include <linux/errno.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <asm/io.h>
+#include <asm/hardware.h>
+#include <asm/arch/gpio.h>
+#include "board-mx31lite.h"
+#include "iomux.h"
+
+/*!
+ * @file mach-mx3/mx31lite_gpio.c
+ *
+ * @brief This file contains all the GPIO setup functions for the board.
+ *
+ * @ingroup GPIO_MX31
+ */
+
+void gpio_activate_audio_ports(void);
+
+/*!
+ * This system-wise GPIO function initializes the pins during system startup.
+ * All the statically linked device drivers should put the proper GPIO initialization
+ * code inside this function. It is called by \b mxc_board_init() during
+ * system startup. This function is board specific.
+ */
+void mx31lite_gpio_init(void)
+{
+ /* config CS4 */
+ mxc_request_iomux(MX31_PIN_CS4, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+
+ /*Connect DAM ports 4 & 5 to enable audio I/O */
+ gpio_activate_audio_ports();
+}
+
+/*!
+ * Setup GPIO for a UART port to be active
+ *
+ * @param port a UART port
+ * @param no_irda indicates if the port is used for SIR
+ */
+void gpio_uart_active(int port, int no_irda)
+{
+ /*
+ * Configure the IOMUX control registers for the UART signals
+ */
+ switch (port) {
+ /* UART 1 IOMUX Configs */
+ case 0:
+ mxc_request_iomux(MX31_PIN_RXD1, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_TXD1, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_RTS1, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_CTS1, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_DTR_DTE1, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_DSR_DTE1, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ break;
+ /* UART 2 IOMUX Configs */
+ case 1:
+ mxc_request_iomux(MX31_PIN_TXD2, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // Tx: Breakout: J17-30
+ mxc_request_iomux(MX31_PIN_RXD2, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // Rx: Breakout: J17-31
+ mxc_request_iomux(MX31_PIN_RTS2, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // RTS: Breakout: J17-28
+ mxc_request_iomux(MX31_PIN_CTS2, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // CTS: Breakout: J17-29
+
+ mxc_iomux_set_gpr(MUX_PGP_FIRI, false);
+ break;
+ /* UART 3 IOMUX Configs */
+ case 2:
+ mxc_request_iomux(MX31_PIN_CSPI1_MISO, OUTPUTCONFIG_ALT2, INPUTCONFIG_ALT2); // Tx: Breakout: J4-3
+ mxc_request_iomux(MX31_PIN_CSPI1_MOSI, OUTPUTCONFIG_ALT2, INPUTCONFIG_ALT2); // RX: Breakout: J4-5
+ mxc_request_iomux(MX31_PIN_CSPI1_SCLK, OUTPUTCONFIG_ALT2, INPUTCONFIG_ALT2); // RTS: Breakout: J4-1
+ mxc_request_iomux(MX31_PIN_CSPI1_SPI_RDY, OUTPUTCONFIG_ALT2, INPUTCONFIG_ALT2); // CTS: Breakout: J15-39
+
+ mxc_iomux_set_gpr(MUX_CSPI1_UART3, true);
+ break;
+ /* UART 4 IOMUX Configs */
+#if UART4_MODE == 1
+ case 3:
+ mxc_request_iomux(MX31_PIN_ATA_CS0, OUTPUTCONFIG_ALT1, INPUTCONFIG_ALT1);
+ mxc_request_iomux(MX31_PIN_ATA_CS1, OUTPUTCONFIG_ALT1, INPUTCONFIG_ALT1);
+ mxc_request_iomux(MX31_PIN_ATA_DIOR, OUTPUTCONFIG_ALT1, INPUTCONFIG_ALT1);
+ mxc_request_iomux(MX31_PIN_ATA_DIOW, OUTPUTCONFIG_ALT1, INPUTCONFIG_ALT1);
+ break;
+#endif
+
+#if UART5_MODE == 1
+ /* UART 5 IOMUX Configs */
+ case 4:
+ mxc_request_iomux(MX31_PIN_PC_VS2, OUTPUTCONFIG_ALT2, INPUTCONFIG_ALT2);
+ mxc_request_iomux(MX31_PIN_PC_RST, OUTPUTCONFIG_ALT2, INPUTCONFIG_ALT2);
+ mxc_request_iomux(MX31_PIN_PC_BVD1, OUTPUTCONFIG_ALT2, INPUTCONFIG_ALT2);
+ mxc_request_iomux(MX31_PIN_PC_BVD2, OUTPUTCONFIG_ALT2, INPUTCONFIG_ALT2);
+ break;
+#endif
+ default:
+ break;
+ }
+
+ /*
+ * TODO: Configure the Pad registers for the UART pins
+ */
+}
+
+/*!
+ * Setup GPIO for a UART port to be inactive
+ *
+ * @param port a UART port
+ * @param no_irda indicates if the port is used for SIR
+ */
+void gpio_uart_inactive(int port, int no_irda)
+{
+ switch (port) {
+ /* UART 1 IOMUX Configs */
+ case 0:
+ mxc_free_iomux(MX31_PIN_RXD1, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE);
+ mxc_free_iomux(MX31_PIN_TXD1, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE);
+ mxc_free_iomux(MX31_PIN_RTS1, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE);
+ mxc_free_iomux(MX31_PIN_CTS1, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE);
+ mxc_free_iomux(MX31_PIN_DTR_DTE1, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE);
+ mxc_free_iomux(MX31_PIN_DSR_DTE1, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE);
+ break;
+ /* UART 2 IOMUX Configs */
+ case 1:
+ mxc_free_iomux(MX31_PIN_TXD2, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE);
+ mxc_free_iomux(MX31_PIN_RXD2, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE);
+ mxc_free_iomux(MX31_PIN_RTS2, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE);
+ mxc_free_iomux(MX31_PIN_CTS2, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE);
+ break;
+ /* UART 3 IOMUX Configs */
+ case 2:
+ mxc_free_iomux(MX31_PIN_CSPI1_MISO, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE);
+ mxc_free_iomux(MX31_PIN_CSPI1_MOSI, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE);
+ mxc_free_iomux(MX31_PIN_CSPI1_SCLK, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE);
+ mxc_free_iomux(MX31_PIN_CSPI1_SPI_RDY, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE);
+ break;
+ /* UART 4 IOMUX Configs */
+ case 3:
+ mxc_free_iomux(MX31_PIN_ATA_CS0, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE);
+ mxc_free_iomux(MX31_PIN_ATA_CS1, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE);
+ mxc_free_iomux(MX31_PIN_ATA_DIOR, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE);
+ mxc_free_iomux(MX31_PIN_ATA_DIOW, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE);
+ break;
+ /* UART 5 IOMUX Configs */
+ case 4:
+ mxc_free_iomux(MX31_PIN_PC_VS2, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE);
+ mxc_free_iomux(MX31_PIN_PC_RST, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE);
+ mxc_free_iomux(MX31_PIN_PC_BVD1, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE);
+ mxc_free_iomux(MX31_PIN_PC_BVD2, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE);
+ break;
+ default:
+ break;
+ }
+}
+
+/*!
+ * Configure the IOMUX GPR register to receive shared SDMA UART events
+ *
+ * @param port a UART port
+ */
+void config_uartdma_event(int port)
+{
+ switch (port) {
+ case 1:
+ /* Configure to receive UART 2 SDMA events */
+ mxc_iomux_set_gpr(MUX_PGP_FIRI, false);
+ break;
+ case 2:
+ /* Configure to receive UART 3 SDMA events */
+ mxc_iomux_set_gpr(MUX_CSPI1_UART3, true);
+ break;
+
+#if UART5_MODE == 1
+ case 4:
+ /* Configure to receive UART 5 SDMA events */
+ mxc_iomux_set_gpr(MUX_CSPI3_UART5_SEL, true);
+ break;
+#endif
+ default:
+ break;
+ }
+}
+
+EXPORT_SYMBOL(gpio_uart_active);
+EXPORT_SYMBOL(gpio_uart_inactive);
+EXPORT_SYMBOL(config_uartdma_event);
+
+/*!
+ * Setup GPIO for Keypad to be active
+ *
+ */
+void gpio_keypad_active(void)
+{
+ /*
+ * Configure the IOMUX control register for keypad signals.
+ */
+ mxc_request_iomux(MX31_PIN_KEY_COL0, OUTPUTCONFIG_FUNC,
+ INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_KEY_COL1, OUTPUTCONFIG_FUNC,
+ INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_KEY_COL2, OUTPUTCONFIG_FUNC,
+ INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_KEY_COL3, OUTPUTCONFIG_FUNC,
+ INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_KEY_COL4, OUTPUTCONFIG_FUNC,
+ INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_KEY_COL5, OUTPUTCONFIG_FUNC,
+ INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_KEY_COL6, OUTPUTCONFIG_FUNC,
+ INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_KEY_COL7, OUTPUTCONFIG_FUNC,
+ INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_KEY_ROW0, OUTPUTCONFIG_FUNC,
+ INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_KEY_ROW1, OUTPUTCONFIG_FUNC,
+ INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_KEY_ROW2, OUTPUTCONFIG_FUNC,
+ INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_KEY_ROW3, OUTPUTCONFIG_FUNC,
+ INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_KEY_ROW4, OUTPUTCONFIG_FUNC,
+ INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_KEY_ROW5, OUTPUTCONFIG_FUNC,
+ INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_KEY_ROW6, OUTPUTCONFIG_FUNC,
+ INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_KEY_ROW7, OUTPUTCONFIG_FUNC,
+ INPUTCONFIG_FUNC);
+}
+
+EXPORT_SYMBOL(gpio_keypad_active);
+
+/*!
+ * Setup GPIO for Keypad to be inactive
+ *
+ */
+void gpio_keypad_inactive(void)
+{
+ mxc_request_iomux(MX31_PIN_KEY_COL4, OUTPUTCONFIG_GPIO,
+ INPUTCONFIG_GPIO);
+ mxc_request_iomux(MX31_PIN_KEY_COL5, OUTPUTCONFIG_GPIO,
+ INPUTCONFIG_GPIO);
+ mxc_request_iomux(MX31_PIN_KEY_COL6, OUTPUTCONFIG_GPIO,
+ INPUTCONFIG_GPIO);
+ mxc_request_iomux(MX31_PIN_KEY_COL7, OUTPUTCONFIG_GPIO,
+ INPUTCONFIG_GPIO);
+
+ mxc_request_iomux(MX31_PIN_KEY_ROW4, OUTPUTCONFIG_GPIO,
+ INPUTCONFIG_GPIO);
+ mxc_request_iomux(MX31_PIN_KEY_ROW5, OUTPUTCONFIG_GPIO,
+ INPUTCONFIG_GPIO);
+ mxc_request_iomux(MX31_PIN_KEY_ROW6, OUTPUTCONFIG_GPIO,
+ INPUTCONFIG_GPIO);
+ mxc_request_iomux(MX31_PIN_KEY_ROW7, OUTPUTCONFIG_GPIO,
+ INPUTCONFIG_GPIO);
+}
+
+EXPORT_SYMBOL(gpio_keypad_inactive);
+
+void gpio_power_key_active(void)
+{
+}
+EXPORT_SYMBOL(gpio_power_key_active);
+
+/*!
+ * Setup GPIO for a CSPI device to be active
+ *
+ * @param cspi_mod an CSPI device
+ */
+void gpio_spi_active(int cspi_mod)
+{
+ switch (cspi_mod) {
+ //case 0:
+ /* SPI1 */
+ /* SPI1 - No way to support this on litekit */
+ //mxc_request_iomux(MX31_PIN_CSPI1_MISO, OUTPUTCONFIG_FUNC,
+ // INPUTCONFIG_FUNC);
+ //mxc_request_iomux(MX31_PIN_CSPI1_MOSI, OUTPUTCONFIG_FUNC,
+ // INPUTCONFIG_FUNC);
+ //mxc_request_iomux(MX31_PIN_CSPI1_SCLK, OUTPUTCONFIG_FUNC,
+ // INPUTCONFIG_FUNC);
+ //mxc_request_iomux(MX31_PIN_CSPI1_SPI_RDY, OUTPUTCONFIG_FUNC,
+ // INPUTCONFIG_FUNC);
+ //mxc_request_iomux(MX31_PIN_CSPI1_SS0, OUTPUTCONFIG_FUNC,
+ // INPUTCONFIG_FUNC);
+ //mxc_request_iomux(MX31_PIN_CSPI1_SS1, OUTPUTCONFIG_FUNC,
+ // INPUTCONFIG_FUNC);
+ //mxc_request_iomux(MX31_PIN_CSPI1_SS2, OUTPUTCONFIG_FUNC,
+ // INPUTCONFIG_FUNC);
+ //break;
+ case 1:
+ /* SPI2 */
+ mxc_request_iomux(MX31_PIN_CSPI2_MISO, OUTPUTCONFIG_FUNC,
+ INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_CSPI2_MOSI, OUTPUTCONFIG_FUNC,
+ INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_CSPI2_SCLK, OUTPUTCONFIG_FUNC,
+ INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_CSPI2_SPI_RDY, OUTPUTCONFIG_FUNC,
+ INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_CSPI2_SS0, OUTPUTCONFIG_FUNC,
+ INPUTCONFIG_FUNC);
+ // The other pins for SPI2 do not route externally, and these pins are needed
+ // for SPI3
+ //mxc_request_iomux(MX31_PIN_CSPI2_SS1, OUTPUTCONFIG_FUNC,
+ // INPUTCONFIG_FUNC);
+ //mxc_request_iomux(MX31_PIN_CSPI2_SS2, OUTPUTCONFIG_FUNC,
+ // INPUTCONFIG_FUNC);
+ break;
+ case 2:
+ /* SPI3 */
+ mxc_request_iomux(MX31_PIN_CSPI3_MISO, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_CSPI3_MOSI, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_CSPI3_SCLK, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_CSPI3_SPI_RDY, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_CSPI2_SS1, OUTPUTCONFIG_ALT1, INPUTCONFIG_ALT1); /* CSPI3_SS1 */
+ mxc_request_iomux(MX31_PIN_CSPI1_SS0, OUTPUTCONFIG_ALT2, INPUTCONFIG_ALT2); /* CSPI3_SS2 */
+ mxc_request_iomux(MX31_PIN_CSPI1_SS2, OUTPUTCONFIG_ALT2, INPUTCONFIG_ALT2); /* CSPI3_SS3 */
+ break;
+ default:
+ break;
+ }
+}
+
+/*!
+ * Setup GPIO for a CSPI device to be inactive
+ *
+ * @param cspi_mod a CSPI device
+ */
+void gpio_spi_inactive(int cspi_mod)
+{
+ switch(cspi_mod){
+
+ case 1:
+ mxc_free_iomux(MX31_PIN_CSPI2_MISO, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE);
+ mxc_free_iomux(MX31_PIN_CSPI2_MOSI, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE);
+ mxc_free_iomux(MX31_PIN_CSPI2_SCLK, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE);
+ mxc_free_iomux(MX31_PIN_CSPI2_SPI_RDY, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE);
+ mxc_free_iomux(MX31_PIN_CSPI2_SS0, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE);
+ break;
+
+ case 2:
+ mxc_free_iomux(MX31_PIN_CSPI3_MISO, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE);
+ mxc_free_iomux(MX31_PIN_CSPI3_MOSI, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE);
+ mxc_free_iomux(MX31_PIN_CSPI3_SCLK, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE);
+ mxc_free_iomux(MX31_PIN_CSPI3_SPI_RDY, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE);
+ mxc_free_iomux(MX31_PIN_CSPI2_SS1, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE); /* CSPI3_SS1 */
+ mxc_free_iomux(MX31_PIN_CSPI1_SS0, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE); /* CSPI3_SS2 */
+ mxc_free_iomux(MX31_PIN_CSPI1_SS2, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE); /* CSPI3_SS3 */
+ break;
+
+ default:
+ break;
+ }
+}
+
+/*!
+ * Setup 1-Wire to be active
+ */
+void gpio_owire_active(void)
+{
+ /*
+ * Configure the IOMUX control register for 1-wire signals.
+ */
+ iomux_config_mux(MX31_PIN_BATT_LINE, OUTPUTCONFIG_FUNC,
+ INPUTCONFIG_FUNC);
+ iomux_config_pad(MX31_PIN_BATT_LINE, PAD_CTL_LOOPBACK);
+}
+
+/*!
+ * Setup 1-Wire to be active
+ */
+void gpio_owire_inactive(void)
+{
+ /*
+ * Configure the IOMUX control register for 1-wire signals.
+ */
+ iomux_config_mux(MX31_PIN_BATT_LINE, OUTPUTCONFIG_GPIO,
+ INPUTCONFIG_GPIO);
+}
+
+EXPORT_SYMBOL(gpio_owire_active);
+EXPORT_SYMBOL(gpio_owire_inactive);
+
+/*!
+ * Setup GPIO for an I2C device to be active
+ *
+ * @param i2c_num an I2C device
+ */
+void gpio_i2c_active(int i2c_num)
+{
+ switch (i2c_num) {
+ case 0:
+ mxc_request_iomux(MX31_PIN_I2C_CLK, OUTPUTCONFIG_FUNC,
+ INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_I2C_DAT, OUTPUTCONFIG_FUNC,
+ INPUTCONFIG_FUNC);
+ break;
+ case 1:
+ mxc_request_iomux(MX31_PIN_RI_DTE1, OUTPUTCONFIG_ALT2,
+ INPUTCONFIG_ALT2);
+ mxc_request_iomux(MX31_PIN_DCD_DTE1, OUTPUTCONFIG_ALT2,
+ INPUTCONFIG_ALT2);
+ break;
+ case 2: /* Not supported on litekit */
+ default:
+ break;
+ }
+
+}
+
+/*!
+ * Setup GPIO for an I2C device to be inactive
+ *
+ * @param i2c_num an I2C device
+ */
+void gpio_i2c_inactive(int i2c_num)
+{
+ switch (i2c_num) {
+ case 0:
+ mxc_free_iomux(MX31_PIN_I2C_CLK, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE);
+ mxc_free_iomux(MX31_PIN_I2C_DAT, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE);
+ break;
+
+ case 1:
+ mxc_free_iomux(MX31_PIN_RI_DTE1, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE);
+ mxc_free_iomux(MX31_PIN_DCD_DTE1, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE);
+ break;
+
+ case 2: /* Not supported on litekit */
+ default:
+ break;
+ }
+}
+
+/*!
+ * This function configures the IOMux block for PMIC standard operations.
+ *
+ */
+void gpio_pmic_active(void)
+{
+ mxc_request_iomux(MX31_PIN_GPIO1_3, OUTPUTCONFIG_GPIO,
+ INPUTCONFIG_GPIO);
+ mxc_set_gpio_direction(MX31_PIN_GPIO1_3, 1);
+// mxc_set_gpio_edge_ctrl(MX31_PIN_GPIO1_3, GPIO_INT_RISE_EDGE);
+}
+
+EXPORT_SYMBOL(gpio_pmic_active);
+
+/*!
+ * This function activates DAM ports 4 & 5 to enable
+ * audio I/O. Thsi function is called from mx31lite_gpio_init
+ * function, which is board-specific.
+ */
+void gpio_activate_audio_ports(void)
+{
+ /* config Audio ports (4 & 5) */
+ mxc_request_iomux(MX31_PIN_SCK4, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_SRXD4, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_STXD4, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_SFS4, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_SCK5, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_SRXD5, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_STXD5, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_SFS5, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+}
+
+/*!
+ * Setup GPIO for SDHC to be active
+ *
+ * @param module SDHC module number
+ */
+void gpio_sdhc_active(int module)
+{
+ switch (module) {
+ case 0:
+ mxc_request_iomux(MX31_PIN_SD1_CLK, OUTPUTCONFIG_FUNC,
+ INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_SD1_CMD, OUTPUTCONFIG_FUNC,
+ INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_SD1_DATA0, OUTPUTCONFIG_FUNC,
+ INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_SD1_DATA1, OUTPUTCONFIG_FUNC,
+ INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_SD1_DATA2, OUTPUTCONFIG_FUNC,
+ INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_SD1_DATA3, OUTPUTCONFIG_FUNC,
+ INPUTCONFIG_FUNC);
+
+ mxc_iomux_set_pad(MX31_PIN_SD1_CLK,
+ (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST));
+ mxc_iomux_set_pad(MX31_PIN_SD1_CMD,
+ (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST));
+ mxc_iomux_set_pad(MX31_PIN_SD1_DATA0,
+ (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST));
+ mxc_iomux_set_pad(MX31_PIN_SD1_DATA1,
+ (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST));
+ mxc_iomux_set_pad(MX31_PIN_SD1_DATA2,
+ (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST));
+ mxc_iomux_set_pad(MX31_PIN_SD1_DATA3,
+ (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST));
+ break;
+ case 1: /* Not supported on the Litekit */
+ default:
+ break;
+ }
+}
+
+EXPORT_SYMBOL(gpio_sdhc_active);
+
+/*!
+ * Setup GPIO for SDHC1 to be inactive
+ *
+ * @param module SDHC module number
+ */
+void gpio_sdhc_inactive(int module)
+{
+ switch (module) {
+ case 0:
+ mxc_request_iomux(MX31_PIN_SD1_CLK, OUTPUTCONFIG_GPIO,
+ INPUTCONFIG_NONE);
+ mxc_request_iomux(MX31_PIN_SD1_CMD, OUTPUTCONFIG_GPIO,
+ INPUTCONFIG_NONE);
+ mxc_request_iomux(MX31_PIN_SD1_DATA0, OUTPUTCONFIG_GPIO,
+ INPUTCONFIG_NONE);
+ mxc_request_iomux(MX31_PIN_SD1_DATA1, OUTPUTCONFIG_GPIO,
+ INPUTCONFIG_NONE);
+ mxc_request_iomux(MX31_PIN_SD1_DATA2, OUTPUTCONFIG_GPIO,
+ INPUTCONFIG_NONE);
+ mxc_request_iomux(MX31_PIN_SD1_DATA3, OUTPUTCONFIG_GPIO,
+ INPUTCONFIG_NONE);
+
+ mxc_iomux_set_pad(MX31_PIN_SD1_CLK,
+ (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_SLOW));
+ mxc_iomux_set_pad(MX31_PIN_SD1_CMD,
+ (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_SLOW));
+ mxc_iomux_set_pad(MX31_PIN_SD1_DATA0,
+ (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_SLOW));
+ mxc_iomux_set_pad(MX31_PIN_SD1_DATA1,
+ (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_SLOW));
+ mxc_iomux_set_pad(MX31_PIN_SD1_DATA2,
+ (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_SLOW));
+ mxc_iomux_set_pad(MX31_PIN_SD1_DATA3,
+ (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_SLOW));
+ break;
+ case 1: /* Not supported on the Litekit */
+ default:
+ break;
+ }
+}
+
+EXPORT_SYMBOL(gpio_sdhc_inactive);
+
+/*
+ * Probe for the card. If present the GPIO data would be set.
+ */
+int sdhc_get_card_det_status(struct device *dev)
+{
+ if (to_platform_device(dev)->id == 0) {
+ return mxc_get_gpio_datain(MX31_PIN_DCD_DCE1);
+ } else {
+ /* Return no card detected for 2nd host */
+ return 1;
+ }
+}
+
+/*
+ * Return the card detect pin.
+ */
+int sdhc_init_card_det(int id)
+{
+ if (id == 0) {
+
+ //write protect input
+ mxc_request_iomux(MX31_PIN_GPIO1_6, OUTPUTCONFIG_GPIO, INPUTCONFIG_GPIO);
+ mxc_set_gpio_direction(MX31_PIN_GPIO1_6,1);
+
+ //card detect INT input
+ mxc_request_iomux(MX31_PIN_DCD_DCE1, OUTPUTCONFIG_GPIO, INPUTCONFIG_GPIO);
+ return IOMUX_TO_IRQ(MX31_PIN_DCD_DCE1);
+ } else {
+ return 0;
+ }
+}
+
+int sdhc_get_write_protect(void)
+{
+ return mxc_get_gpio_datain(MX31_PIN_GPIO1_6);
+}
+
+/*!
+ * Setup GPIO for LCD to be active
+ *
+ */
+void gpio_lcd_active(void)
+{
+ mxc_request_iomux(MX31_PIN_LD0, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_LD1, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_LD2, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_LD3, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_LD4, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_LD5, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_LD6, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_LD7, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_LD8, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_LD9, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_LD10, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_LD11, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_LD12, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_LD13, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_LD14, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_LD15, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_LD16, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // LD16
+ mxc_request_iomux(MX31_PIN_LD17, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // LD17
+ mxc_request_iomux(MX31_PIN_VSYNC3, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // VSYNC
+ mxc_request_iomux(MX31_PIN_HSYNC, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // HSYNC
+ mxc_request_iomux(MX31_PIN_FPSHIFT, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // CLK
+ mxc_request_iomux(MX31_PIN_DRDY0, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // DRDY
+ mxc_request_iomux(MX31_PIN_D3_REV, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // REV
+ mxc_request_iomux(MX31_PIN_CONTRAST, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // CONTR
+ mxc_request_iomux(MX31_PIN_D3_SPL, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // SPL
+ mxc_request_iomux(MX31_PIN_D3_CLS, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // CLS
+}
+
+/*!
+ * Setup GPIO for LCD to be inactive
+ *
+ */
+void gpio_lcd_inactive(void)
+{
+ mxc_free_iomux(MX31_PIN_LD0, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_free_iomux(MX31_PIN_LD1, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_free_iomux(MX31_PIN_LD2, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_free_iomux(MX31_PIN_LD3, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_free_iomux(MX31_PIN_LD4, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_free_iomux(MX31_PIN_LD5, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_free_iomux(MX31_PIN_LD6, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_free_iomux(MX31_PIN_LD7, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_free_iomux(MX31_PIN_LD8, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_free_iomux(MX31_PIN_LD9, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_free_iomux(MX31_PIN_LD10, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_free_iomux(MX31_PIN_LD11, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_free_iomux(MX31_PIN_LD12, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_free_iomux(MX31_PIN_LD13, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_free_iomux(MX31_PIN_LD14, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_free_iomux(MX31_PIN_LD15, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_free_iomux(MX31_PIN_LD16, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // LD16
+ mxc_free_iomux(MX31_PIN_LD17, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // LD17
+ mxc_free_iomux(MX31_PIN_VSYNC3, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // VSYNC
+ mxc_free_iomux(MX31_PIN_HSYNC, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // HSYNC
+ mxc_free_iomux(MX31_PIN_FPSHIFT, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // CLK
+ mxc_free_iomux(MX31_PIN_DRDY0, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // DRDY
+ mxc_free_iomux(MX31_PIN_D3_REV, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // REV
+ mxc_free_iomux(MX31_PIN_CONTRAST, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // CONTR
+ mxc_free_iomux(MX31_PIN_D3_SPL, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // SPL
+ mxc_free_iomux(MX31_PIN_D3_CLS, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // CLS
+}
+
+/*!
+ * Setup pins for SLCD to be active
+ *
+ */
+void slcd_gpio_config(void)
+{
+ mxc_request_iomux(MX31_PIN_LD0, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_LD1, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_LD2, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_LD3, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_LD4, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_LD5, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_LD6, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_LD7, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_LD8, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_LD9, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_LD10, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_LD11, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_LD12, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_LD13, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_LD14, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_LD15, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_LD16, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_LD17, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+
+ mxc_request_iomux(MX31_PIN_READ, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); /* read */
+ mxc_request_iomux(MX31_PIN_WRITE, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); /* write */
+ mxc_request_iomux(MX31_PIN_PAR_RS, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);/* RS */
+ mxc_request_iomux(MX31_PIN_LCS0, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); /* chip select */
+}
+
+/*!
+ * Setup GPIO for ATA interface
+ *
+ */
+void gpio_ata_active(void)
+{
+ /*
+ * Configure the IOMUX for ATA group B signals
+ */
+
+ mxc_request_iomux(MX31_PIN_CSPI1_MOSI, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // ATA_D0
+ mxc_request_iomux(MX31_PIN_CSPI1_MISO, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // ATA_D1
+ mxc_request_iomux(MX31_PIN_CSPI1_SS0, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // ATA_D2
+ mxc_request_iomux(MX31_PIN_CSPI1_SS1, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // ATA_D3
+ mxc_request_iomux(MX31_PIN_CSPI1_SS2, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // ATA_D4
+ mxc_request_iomux(MX31_PIN_CSPI1_SCLK, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // ATA_D5
+ mxc_request_iomux(MX31_PIN_CSPI1_SPI_RDY, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // ATA_D6
+ mxc_request_iomux(MX31_PIN_STXD3, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // ATA_D7
+ mxc_request_iomux(MX31_PIN_SRXD3, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // ATA_D8
+ mxc_request_iomux(MX31_PIN_SCK3, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // ATA_D9
+ mxc_request_iomux(MX31_PIN_SFS3, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // ATA_D10
+ mxc_request_iomux(MX31_PIN_STXD6, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // ATA_D11
+ mxc_request_iomux(MX31_PIN_SRXD6, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // ATA_D12
+ mxc_request_iomux(MX31_PIN_SCK6, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // ATA_D13
+ mxc_request_iomux(MX31_PIN_CAPTURE, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // ATA_D14
+ mxc_request_iomux(MX31_PIN_COMPARE, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // ATA_D15
+
+ mxc_request_iomux(MX31_PIN_USBH2_STP, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // ATA_DMARQ_B
+ mxc_request_iomux(MX31_PIN_USBH2_CLK, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // ATA_INTRQ_B
+ mxc_request_iomux(MX31_PIN_USBH2_NXT, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // ATA_DA0
+ mxc_request_iomux(MX31_PIN_USBH2_DATA0, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // ATA_DA1
+ mxc_request_iomux(MX31_PIN_USBH2_DATA1, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // ATA_DA2
+ mxc_request_iomux(MX31_PIN_USBH2_DIR, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC); // ATA_BUFFER_DIR
+
+ /* These ATA pins are common to Group A and Group B */
+
+ mxc_request_iomux(MX31_PIN_ATA_CS0, OUTPUTCONFIG_FUNC,
+ INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_ATA_CS1, OUTPUTCONFIG_FUNC,
+ INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_ATA_DIOR, OUTPUTCONFIG_FUNC,
+ INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_ATA_DIOW, OUTPUTCONFIG_FUNC,
+ INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_ATA_DMACK, OUTPUTCONFIG_FUNC,
+ INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_ATA_RESET_B, OUTPUTCONFIG_FUNC,
+ INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_PWMO, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+
+ /* Need fast slew rate for UDMA mode */
+
+ mxc_iomux_set_pad(MX31_PIN_CSPI1_MISO, PAD_CTL_SRE_FAST | PAD_CTL_PKE_NONE); // data 0
+ mxc_iomux_set_pad(MX31_PIN_CSPI1_MOSI, PAD_CTL_SRE_FAST | PAD_CTL_PKE_NONE); // data 1
+ mxc_iomux_set_pad(MX31_PIN_CSPI1_SS0, PAD_CTL_SRE_FAST | PAD_CTL_PKE_NONE); // data 2
+ mxc_iomux_set_pad(MX31_PIN_CSPI1_SS1, PAD_CTL_SRE_FAST | PAD_CTL_PKE_NONE); // data 3
+ mxc_iomux_set_pad(MX31_PIN_CSPI1_SS2, PAD_CTL_SRE_FAST | PAD_CTL_PKE_NONE); // data 4
+ mxc_iomux_set_pad(MX31_PIN_CSPI1_SCLK, PAD_CTL_SRE_FAST | PAD_CTL_PKE_NONE); // data 5
+ mxc_iomux_set_pad(MX31_PIN_CSPI1_SPI_RDY, PAD_CTL_SRE_FAST | PAD_CTL_PKE_NONE); // data 6
+ mxc_iomux_set_pad(MX31_PIN_STXD3, PAD_CTL_SRE_FAST | PAD_CTL_PKE_NONE); // data 7
+ mxc_iomux_set_pad(MX31_PIN_SRXD3, PAD_CTL_SRE_FAST | PAD_CTL_PKE_NONE); // data 8
+ mxc_iomux_set_pad(MX31_PIN_SCK3, PAD_CTL_SRE_FAST | PAD_CTL_PKE_NONE); // data 9
+ mxc_iomux_set_pad(MX31_PIN_SFS3, PAD_CTL_SRE_FAST | PAD_CTL_PKE_NONE); // data 10
+ mxc_iomux_set_pad(MX31_PIN_STXD6, PAD_CTL_SRE_FAST | PAD_CTL_PKE_NONE); // data 11
+ mxc_iomux_set_pad(MX31_PIN_SRXD6, PAD_CTL_SRE_FAST | PAD_CTL_PKE_NONE); // data 12
+ mxc_iomux_set_pad(MX31_PIN_SCK6, PAD_CTL_SRE_FAST | PAD_CTL_PKE_NONE); // data 13
+ mxc_iomux_set_pad(MX31_PIN_CAPTURE, PAD_CTL_SRE_FAST | PAD_CTL_PKE_NONE); // data 14
+ mxc_iomux_set_pad(MX31_PIN_COMPARE, PAD_CTL_SRE_FAST | PAD_CTL_PKE_NONE); // data 12
+
+ /*
+ * Turn off default pullups on high asserted control signals.
+ * These are pulled down externally, so it will just waste
+ * power and create voltage divider action to pull them up
+ * on chip.
+ */
+ mxc_iomux_set_pad(MX31_PIN_USBH2_STP, PAD_CTL_PKE_NONE); // ATA_DMARQ
+ mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, PAD_CTL_PKE_NONE); // ATA_INTRQ
+}
+
+EXPORT_SYMBOL(gpio_ata_active);
+
+/*!
+ * Restore ATA interface pins to reset values
+ *
+ */
+void gpio_ata_inactive(void)
+{
+ /*
+ * Turn off ATA group B signals
+ */
+ mxc_request_iomux(MX31_PIN_STXD3, OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE); // ATA_D7
+ mxc_request_iomux(MX31_PIN_SRXD3, OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE); // ATA_D8
+ mxc_request_iomux(MX31_PIN_STXD6, OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE); // ATA_D11
+ mxc_request_iomux(MX31_PIN_SRXD6, OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE); // ATA_D12
+ mxc_request_iomux(MX31_PIN_SCK6, OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE); // ATA_D13
+ mxc_request_iomux(MX31_PIN_CAPTURE, OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE); // ATA_D14
+ mxc_request_iomux(MX31_PIN_COMPARE, OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE); // ATA_D15
+
+ /* These ATA pins are common to Group A and Group B */
+
+ mxc_request_iomux(MX31_PIN_ATA_CS0, OUTPUTCONFIG_GPIO,
+ INPUTCONFIG_NONE);
+ mxc_request_iomux(MX31_PIN_ATA_CS1, OUTPUTCONFIG_GPIO,
+ INPUTCONFIG_NONE);
+ mxc_request_iomux(MX31_PIN_ATA_DIOR, OUTPUTCONFIG_GPIO,
+ INPUTCONFIG_NONE);
+ mxc_request_iomux(MX31_PIN_ATA_DIOW, OUTPUTCONFIG_GPIO,
+ INPUTCONFIG_NONE);
+ mxc_request_iomux(MX31_PIN_ATA_DMACK, OUTPUTCONFIG_GPIO,
+ INPUTCONFIG_NONE);
+ mxc_request_iomux(MX31_PIN_ATA_RESET_B, OUTPUTCONFIG_GPIO,
+ INPUTCONFIG_NONE);
+
+ /* Needed fast slew rate for UDMA mode */
+
+ mxc_iomux_set_pad(MX31_PIN_CSPI1_MISO, PAD_CTL_SRE_SLOW | PAD_CTL_PKE_NONE); // data 0
+ mxc_iomux_set_pad(MX31_PIN_CSPI1_MOSI, PAD_CTL_SRE_SLOW | PAD_CTL_PKE_NONE); // data 1
+ mxc_iomux_set_pad(MX31_PIN_CSPI1_SS0, PAD_CTL_SRE_SLOW | PAD_CTL_PKE_NONE); // data 2
+ mxc_iomux_set_pad(MX31_PIN_CSPI1_SS1, PAD_CTL_SRE_SLOW | PAD_CTL_PKE_NONE); // data 3
+ mxc_iomux_set_pad(MX31_PIN_CSPI1_SS2, PAD_CTL_SRE_SLOW | PAD_CTL_PKE_NONE); // data 4
+ mxc_iomux_set_pad(MX31_PIN_CSPI1_SCLK, PAD_CTL_SRE_SLOW | PAD_CTL_PKE_NONE); // data 5
+ mxc_iomux_set_pad(MX31_PIN_CSPI1_SPI_RDY, PAD_CTL_SRE_SLOW | PAD_CTL_PKE_NONE); // data 6
+ mxc_iomux_set_pad(MX31_PIN_STXD3, PAD_CTL_SRE_SLOW | PAD_CTL_PKE_NONE); // data 7
+ mxc_iomux_set_pad(MX31_PIN_SRXD3, PAD_CTL_SRE_SLOW | PAD_CTL_PKE_NONE); // data 8
+ mxc_iomux_set_pad(MX31_PIN_SCK3, PAD_CTL_SRE_SLOW | PAD_CTL_PKE_NONE); // data 9
+ mxc_iomux_set_pad(MX31_PIN_SFS3, PAD_CTL_SRE_SLOW | PAD_CTL_PKE_NONE); // data 10
+ mxc_iomux_set_pad(MX31_PIN_STXD3, PAD_CTL_SRE_SLOW | PAD_CTL_PKE_NONE); // data 11
+ mxc_iomux_set_pad(MX31_PIN_SRXD6, PAD_CTL_SRE_SLOW | PAD_CTL_PKE_NONE); // data 12
+ mxc_iomux_set_pad(MX31_PIN_SCK6, PAD_CTL_SRE_SLOW | PAD_CTL_PKE_NONE); // data 13
+ mxc_iomux_set_pad(MX31_PIN_CAPTURE, PAD_CTL_SRE_SLOW | PAD_CTL_PKE_NONE); // data 14
+ mxc_iomux_set_pad(MX31_PIN_COMPARE, PAD_CTL_SRE_SLOW | PAD_CTL_PKE_NONE); // data 12
+}
+
+EXPORT_SYMBOL(gpio_ata_inactive);
+
+/*
+ * USB Host 2
+ * pins conflict with UART5, PCMCIA
+ */
+int gpio_usbh2_active(void)
+{
+ if (mxc_request_iomux(MX31_PIN_USBH2_CLK,
+ OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) ||
+ mxc_request_iomux(MX31_PIN_USBH2_DIR,
+ OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) ||
+ mxc_request_iomux(MX31_PIN_USBH2_NXT,
+ OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) ||
+ mxc_request_iomux(MX31_PIN_USBH2_STP,
+ OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) ||
+ mxc_request_iomux(MX31_PIN_USBH2_DATA0,
+ OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) ||
+ mxc_request_iomux(MX31_PIN_USBH2_DATA1,
+ OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) ||
+ mxc_request_iomux(MX31_PIN_STXD3,
+ OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) || /* USBH2_DATA2 */
+ mxc_request_iomux(MX31_PIN_SRXD3,
+ OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) || /* USBH2_DATA3 */
+ mxc_request_iomux(MX31_PIN_SCK3,
+ OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) || /* USBH2_DATA4 */
+ mxc_request_iomux(MX31_PIN_SFS3,
+ OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) || /* USBH2_DATA5 */
+ mxc_request_iomux(MX31_PIN_STXD6,
+ OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) || /* USBH2_DATA6 */
+ mxc_request_iomux(MX31_PIN_SRXD6,
+ OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) || /* USBH2_DATA7*/
+ mxc_request_iomux(MX31_PIN_DTR_DCE1,
+ OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE)) /* Chip Select */
+ {
+ return -EINVAL;
+ }
+
+#define H2_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
+ mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, H2_PAD_CFG);
+ mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, H2_PAD_CFG);
+ mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, H2_PAD_CFG);
+ mxc_iomux_set_pad(MX31_PIN_USBH2_STP, H2_PAD_CFG);
+ mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, H2_PAD_CFG);
+ mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, H2_PAD_CFG);
+ mxc_iomux_set_pad(MX31_PIN_STXD3, H2_PAD_CFG); /* USBH2_DATA2 */
+ mxc_iomux_set_pad(MX31_PIN_SRXD3, H2_PAD_CFG); /* USBH2_DATA3 */
+ mxc_iomux_set_pad(MX31_PIN_SCK3, H2_PAD_CFG); /* USBH2_DATA4 */
+ mxc_iomux_set_pad(MX31_PIN_SFS3, H2_PAD_CFG); /* USBH2_DATA5 */
+ mxc_iomux_set_pad(MX31_PIN_STXD6, H2_PAD_CFG); /* USBH2_DATA6 */
+ mxc_iomux_set_pad(MX31_PIN_SRXD6, H2_PAD_CFG); /* USBH2_DATA7 */
+ mxc_iomux_set_pad(MX31_PIN_DTR_DCE1, H2_PAD_CFG); /* Chip Select */
+#undef H2_PAD_CFG
+
+ mxc_iomux_set_gpr(MUX_PGP_ATA_2, false);
+ mxc_iomux_set_gpr(MUX_PGP_UH2, true); // <><><> Todo: Is this needed with this pin configuration?
+
+ mxc_set_gpio_direction(MX31_PIN_DTR_DCE1, 0);
+ mxc_set_gpio_dataout(MX31_PIN_DTR_DCE1, 0);
+
+ return 0;
+}
+
+EXPORT_SYMBOL(gpio_usbh2_active);
+
+void gpio_usbh2_inactive(void)
+{
+ iomux_config_gpr(MUX_PGP_UH2, false);
+ mxc_set_gpio_dataout(MX31_PIN_DTR_DCE1, 1);
+
+ mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_FAST));
+ mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_FAST));
+ mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_FAST));
+ mxc_iomux_set_pad(MX31_PIN_USBH2_STP, (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_FAST));
+ mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_FAST));
+ mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_FAST));
+ mxc_iomux_set_pad(MX31_PIN_STXD3, (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_FAST)); /* USBH2_DATA2 */
+ mxc_iomux_set_pad(MX31_PIN_SRXD3, (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_FAST)); /* USBH2_DATA3 */
+ mxc_iomux_set_pad(MX31_PIN_SCK3, (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_FAST)); /* USBH2_DATA4 */
+ mxc_iomux_set_pad(MX31_PIN_SFS3, (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_FAST)); /* USBH2_DATA5 */
+ mxc_iomux_set_pad(MX31_PIN_STXD6, (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_FAST)); /* USBH2_DATA6 */
+ mxc_iomux_set_pad(MX31_PIN_SRXD6, (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_FAST)); /* USBH2_DATA7 */
+ mxc_iomux_set_pad(MX31_PIN_DTR_DCE1, (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_FAST)); /* Chip Select */
+
+ mxc_free_iomux(MX31_PIN_USBH2_CLK, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE);
+ mxc_free_iomux(MX31_PIN_USBH2_DIR, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE);
+ mxc_free_iomux(MX31_PIN_USBH2_NXT, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE);
+ mxc_free_iomux(MX31_PIN_USBH2_STP, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE);
+ mxc_free_iomux(MX31_PIN_USBH2_DATA0, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE);
+ mxc_free_iomux(MX31_PIN_USBH2_DATA1, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE);
+ mxc_free_iomux(MX31_PIN_STXD3, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE); /* USBH2_DATA2 */
+ mxc_free_iomux(MX31_PIN_SRXD3, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE); /* USBH2_DATA3 */
+ mxc_free_iomux(MX31_PIN_SCK3, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE); /* USBH2_DATA4 */
+ mxc_free_iomux(MX31_PIN_SFS3, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE); /* USBH2_DATA5 */
+ mxc_free_iomux(MX31_PIN_STXD6, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE); /* USBH2_DATA6 */
+ mxc_free_iomux(MX31_PIN_SRXD6, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE); /* USBH2_DATA7 */
+ mxc_free_iomux(MX31_PIN_DTR_DCE1, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE); /* Chip Select */
+}
+
+EXPORT_SYMBOL(gpio_usbh2_inactive);
+
+/*
+ * USB OTG HS port
+ */
+int gpio_usbotg_hs_active(void)
+{
+ if (mxc_request_iomux(MX31_PIN_USBOTG_DATA0,
+ OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) ||
+ mxc_request_iomux(MX31_PIN_USBOTG_DATA1,
+ OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) ||
+ mxc_request_iomux(MX31_PIN_USBOTG_DATA2,
+ OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) ||
+ mxc_request_iomux(MX31_PIN_USBOTG_DATA3,
+ OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) ||
+ mxc_request_iomux(MX31_PIN_USBOTG_DATA4,
+ OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) ||
+ mxc_request_iomux(MX31_PIN_USBOTG_DATA5,
+ OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) ||
+ mxc_request_iomux(MX31_PIN_USBOTG_DATA6,
+ OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) ||
+ mxc_request_iomux(MX31_PIN_USBOTG_DATA7,
+ OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) ||
+ mxc_request_iomux(MX31_PIN_USBOTG_CLK,
+ OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) ||
+ mxc_request_iomux(MX31_PIN_USBOTG_DIR,
+ OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) ||
+ mxc_request_iomux(MX31_PIN_USBOTG_NXT,
+ OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) ||
+ mxc_request_iomux(MX31_PIN_USBOTG_STP,
+ OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) ||
+ mxc_request_iomux(MX31_PIN_DTR_DCE2,
+ OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE)) {
+ return -EINVAL;
+ }
+
+ mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0,
+ (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST));
+ mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1,
+ (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST));
+ mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2,
+ (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST));
+ mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3,
+ (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST));
+ mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4,
+ (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST));
+ mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5,
+ (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST));
+ mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6,
+ (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST));
+ mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7,
+ (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST));
+ mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK,
+ (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST));
+ mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR,
+ (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST));
+ mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT,
+ (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST));
+ mxc_iomux_set_pad(MX31_PIN_USBOTG_STP,
+ (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST));
+
+ mxc_set_gpio_direction(MX31_PIN_DTR_DCE2, 0);
+ mxc_set_gpio_dataout(MX31_PIN_DTR_DCE2, 0);
+
+ return 0;
+}
+
+EXPORT_SYMBOL(gpio_usbotg_hs_active);
+
+void gpio_usbotg_hs_inactive(void)
+{
+ mxc_set_gpio_dataout(MX31_PIN_DTR_DCE2, 1);
+
+ mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_SLOW));
+ mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_SLOW));
+ mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_SLOW));
+ mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_SLOW));
+ mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_SLOW));
+ mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_SLOW));
+ mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_SLOW));
+ mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_SLOW));
+ mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_SLOW));
+ mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_SLOW));
+ mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_SLOW));
+ mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, (PAD_CTL_DRV_NORMAL | PAD_CTL_SRE_SLOW));
+
+ mxc_free_iomux(MX31_PIN_USBOTG_DATA0, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE);
+ mxc_free_iomux(MX31_PIN_USBOTG_DATA1, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE);
+ mxc_free_iomux(MX31_PIN_USBOTG_DATA2, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE);
+ mxc_free_iomux(MX31_PIN_USBOTG_DATA3, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE);
+ mxc_free_iomux(MX31_PIN_USBOTG_DATA4, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE);
+ mxc_free_iomux(MX31_PIN_USBOTG_DATA5, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE);
+ mxc_free_iomux(MX31_PIN_USBOTG_DATA6, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE);
+ mxc_free_iomux(MX31_PIN_USBOTG_DATA7, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE);
+ mxc_free_iomux(MX31_PIN_USBOTG_CLK, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE);
+ mxc_free_iomux(MX31_PIN_USBOTG_DIR, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE);
+ mxc_free_iomux(MX31_PIN_USBOTG_NXT, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE);
+ mxc_free_iomux(MX31_PIN_USBOTG_STP, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE);
+ mxc_free_iomux(MX31_PIN_DTR_DCE2, OUTPUTCONFIG_FUNC, INPUTCONFIG_NONE);
+}
+
+EXPORT_SYMBOL(gpio_usbotg_hs_inactive);
+
+/*
+ * USB OTG FS port
+ */
+int gpio_usbotg_fs_active(void)
+{
+ if (mxc_request_iomux(MX31_PIN_USBOTG_DATA0,
+ OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) ||
+ mxc_request_iomux(MX31_PIN_USBOTG_DATA1,
+ OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) ||
+ mxc_request_iomux(MX31_PIN_USBOTG_DATA2,
+ OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) ||
+ mxc_request_iomux(MX31_PIN_USBOTG_DATA3,
+ OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) ||
+ mxc_request_iomux(MX31_PIN_USBOTG_DATA4,
+ OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) ||
+ mxc_request_iomux(MX31_PIN_USBOTG_DATA5,
+ OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) ||
+ mxc_request_iomux(MX31_PIN_USBOTG_DATA6,
+ OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) ||
+ mxc_request_iomux(MX31_PIN_USBOTG_DATA7,
+ OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) ||
+ mxc_request_iomux(MX31_PIN_USBOTG_CLK,
+ OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) ||
+ mxc_request_iomux(MX31_PIN_USBOTG_DIR,
+ OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) ||
+ mxc_request_iomux(MX31_PIN_USBOTG_NXT,
+ OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) ||
+ mxc_request_iomux(MX31_PIN_USBOTG_STP,
+ OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC) ||
+ mxc_request_iomux(MX31_PIN_DTR_DCE2,
+ OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE)) {
+ return -EINVAL;
+ }
+
+ mxc_set_gpio_direction(MX31_PIN_DTR_DCE2, 0);
+ mxc_set_gpio_dataout(MX31_PIN_DTR_DCE2, 0);
+
+ return 0;
+
+}
+
+EXPORT_SYMBOL(gpio_usbotg_fs_active);
+
+void gpio_usbotg_fs_inactive(void)
+{
+ gpio_usbotg_hs_inactive();
+
+}
+
+EXPORT_SYMBOL(gpio_usbotg_fs_inactive);
+/* *INDENT-ON* */
+
+/*!
+ * Setup GPIO for PCMCIA interface
+ *
+ */
+void gpio_pcmcia_active(void)
+{
+ mxc_request_iomux(MX31_PIN_SDBA0, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_request_iomux(MX31_PIN_SDBA1, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+
+ iomux_config_mux(MX31_PIN_LBA, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ iomux_config_mux(MX31_PIN_RW, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ iomux_config_mux(MX31_PIN_EB0, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ iomux_config_mux(MX31_PIN_EB1, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ iomux_config_mux(MX31_PIN_OE, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+
+ iomux_config_mux(MX31_PIN_IOIS16, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ iomux_config_mux(MX31_PIN_PC_BVD1, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ iomux_config_mux(MX31_PIN_PC_BVD2, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ iomux_config_mux(MX31_PIN_PC_CD1_B, OUTPUTCONFIG_FUNC,
+ INPUTCONFIG_FUNC);
+ iomux_config_mux(MX31_PIN_PC_CD2_B, OUTPUTCONFIG_FUNC,
+ INPUTCONFIG_FUNC);
+ iomux_config_mux(MX31_PIN_PC_POE, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ iomux_config_mux(MX31_PIN_PC_PWRON, OUTPUTCONFIG_FUNC,
+ INPUTCONFIG_FUNC);
+ iomux_config_mux(MX31_PIN_PC_READY, OUTPUTCONFIG_FUNC,
+ INPUTCONFIG_FUNC);
+ iomux_config_mux(MX31_PIN_PC_RST, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ iomux_config_mux(MX31_PIN_PC_RW_B, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ iomux_config_mux(MX31_PIN_PC_VS1, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ iomux_config_mux(MX31_PIN_PC_VS2, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ iomux_config_mux(MX31_PIN_PC_WAIT_B, OUTPUTCONFIG_FUNC,
+ INPUTCONFIG_FUNC);
+}
+
+EXPORT_SYMBOL(gpio_pcmcia_active);
+
+/*!
+ * Setup GPIO for pcmcia to be inactive
+ */
+void gpio_pcmcia_inactive(void)
+{
+ mxc_free_iomux(MX31_PIN_SDBA0, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_free_iomux(MX31_PIN_SDBA1, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_free_iomux(MX31_PIN_LBA, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_free_iomux(MX31_PIN_RW, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_free_iomux(MX31_PIN_EB0, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_free_iomux(MX31_PIN_EB1, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_free_iomux(MX31_PIN_OE, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_free_iomux(MX31_PIN_IOIS16, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_free_iomux(MX31_PIN_PC_BVD1, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_free_iomux(MX31_PIN_PC_BVD2, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_free_iomux(MX31_PIN_PC_CD1_B, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_free_iomux(MX31_PIN_PC_CD2_B, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_free_iomux(MX31_PIN_PC_POE, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_free_iomux(MX31_PIN_PC_PWRON, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_free_iomux(MX31_PIN_PC_READY, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_free_iomux(MX31_PIN_PC_RST, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_free_iomux(MX31_PIN_PC_RW_B, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_free_iomux(MX31_PIN_PC_VS1, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_free_iomux(MX31_PIN_PC_VS2, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+ mxc_free_iomux(MX31_PIN_PC_WAIT_B, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
+}
+
+EXPORT_SYMBOL(gpio_pcmcia_inactive);
diff -Naur PDK_BSP_R13.baseline/rpm/BUILD/linux/arch/arm/mach-mx3/serial.c PDK_BSP_R13/rpm/BUILD/linux/arch/arm/mach-mx3/serial.c
--- PDK_BSP_R13.baseline/rpm/BUILD/linux/arch/arm/mach-mx3/serial.c 2008-08-18 15:43:26.000000000 -0700
+++ PDK_BSP_R13/rpm/BUILD/linux/arch/arm/mach-mx3/serial.c 2008-08-26 06:58:24.000000000 -0700
@@ -26,6 +26,7 @@
#include "serial.h"
#include "board-mx31ads.h"
#include "board-mx3_3stack.h"
+#include "board-mx31lite.h"

#if defined(CONFIG_SERIAL_MXC) || defined(CONFIG_SERIAL_MXC_MODULE)

diff -Naur PDK_BSP_R13.baseline/rpm/BUILD/linux/arch/arm/mach-mx3/serial.h PDK_BSP_R13/rpm/BUILD/linux/arch/arm/mach-mx3/serial.h
--- PDK_BSP_R13.baseline/rpm/BUILD/linux/arch/arm/mach-mx3/serial.h 2008-08-18 15:43:26.000000000 -0700
+++ PDK_BSP_R13/rpm/BUILD/linux/arch/arm/mach-mx3/serial.h 2008-08-26 06:58:24.000000000 -0700
@@ -61,16 +61,29 @@
*/
#define UART1_UFCR_TXTL 16
/* UART 2 configuration */
+#ifndef CONFIG_MACH_MX31LITE
#define UART2_HW_FLOW 0
#define UART2_UCR4_CTSTL -1
+#else
+#define UART2_HW_FLOW 1
+#define UART2_UCR4_CTSTL 16
+#endif
#define UART2_DMA_ENABLE 0
+#ifndef CONFIG_MACH_MX31LITE
#define UART2_DMA_RXBUFSIZE 512
+#else
+#define UART2_DMA_RXBUFSIZE 1024
+#endif
#define UART2_UFCR_RXTL 16
#define UART2_UFCR_TXTL 16
/* UART 3 configuration */
#define UART3_HW_FLOW 1
#define UART3_UCR4_CTSTL 16
+#ifndef CONFIG_MACH_MX31LITE
#define UART3_DMA_ENABLE 1
+#else
+#define UART3_DMA_ENABLE 0
+#endif
#define UART3_DMA_RXBUFSIZE 1024
#define UART3_UFCR_RXTL 16
#define UART3_UFCR_TXTL 16
diff -Naur PDK_BSP_R13.baseline/rpm/BUILD/linux/arch/arm/mach-mx3/usb.c PDK_BSP_R13/rpm/BUILD/linux/arch/arm/mach-mx3/usb.c
--- PDK_BSP_R13.baseline/rpm/BUILD/linux/arch/arm/mach-mx3/usb.c 2008-08-18 15:43:26.000000000 -0700
+++ PDK_BSP_R13/rpm/BUILD/linux/arch/arm/mach-mx3/usb.c 2008-08-26 06:58:24.000000000 -0700
@@ -55,8 +55,10 @@
extern void fsl_usb_host_uninit(struct fsl_usb2_platform_data *pdata);
extern int usbotg_init(struct platform_device *pdev);
extern void usbotg_uninit(struct fsl_usb2_platform_data *pdata);
+#ifndef CONFIG_MACH_MX31LITE /* USBH1 not supported on litekit */
extern int gpio_usbh1_active(void);
extern void gpio_usbh1_inactive(void);
+#endif
extern int gpio_usbh2_active(void);
extern void gpio_usbh2_inactive(void);
extern int gpio_usbotg_fs_active(void);
@@ -64,6 +66,7 @@
extern int gpio_usbotg_hs_active(void);
extern void gpio_usbotg_hs_inactive(void);

+#ifndef CONFIG_MACH_MX31LITE /* USBH1 not supported on litekit */
#ifdef CONFIG_USB_EHCI_ARC_H1
/*!
* HOST1 config
@@ -93,6 +96,7 @@
};
/* *INDENT-ON* */
#endif
+#endif

#ifdef CONFIG_USB_EHCI_ARC_H2
/*!
@@ -163,6 +167,7 @@
/* *INDENT-OFF* */
#if defined(CONFIG_USB_EHCI_ARC_OTG) || defined(CONFIG_USB_GADGET_ARC) || defined(CONFIG_OTG_BTC_ARC)
#if defined(CONFIG_MC13783_MXC)
+#ifndef CONFIG_MACH_MX31LITE /* Litekit does not use its MC13783 as a transceiver */
static struct fsl_usb2_platform_data mxc_serial_host_config = {
.name = "OTG",
.platform_init = usbotg_init,
@@ -176,6 +181,7 @@
.gpio_usb_inactive = gpio_usbotg_fs_inactive,
.transceiver = "mc13783",
};
+#endif
#elif defined(CONFIG_ISP1301_MXC)
static struct fsl_usb2_platform_data mxc_serial_host_config = {
.name = "OTG",
@@ -232,6 +238,7 @@
static u64 udc_dmamask = ~(u32) 0;

#if defined(CONFIG_MC13783_MXC)
+#ifndef CONFIG_MACH_MX31LITE /* Litekit does not use its MC13783 as a transceiver */
static struct fsl_usb2_platform_data mxc_serial_peripheral_config = {
.name = "OTG",
.platform_init = usbotg_init,
@@ -244,6 +251,7 @@
.gpio_usb_inactive = gpio_usbotg_fs_inactive,
.transceiver = "mc13783",
};
+#endif
#elif defined(CONFIG_ISP1301_MXC)
static struct fsl_usb2_platform_data mxc_serial_peripheral_config = {
.name = "OTG",
@@ -258,6 +266,20 @@
.transceiver = "isp1301",
};
#endif
+#if defined(CONFIG_ISP1504_MXC)
+static struct fsl_usb2_platform_data mxc_isp1504_peripheral_config = {
+ .name = "OTG",
+ .platform_init = usbotg_init,
+ .platform_uninit = usbotg_uninit,
+ .usbmode = (u32) & UOG_USBMODE,
+ .does_otg = 1,
+ .operating_mode = FSL_USB2_DR_DEVICE,
+ .power_budget = 150, /* This is what the litekit would report to a host if it is an OTG gadget */
+ .gpio_usb_active = gpio_usbotg_hs_active,
+ .gpio_usb_inactive = gpio_usbotg_hs_inactive,
+ .transceiver = "isp1504",
+};
+#endif

/* *INDENT-OFF* */
static struct platform_device otg_udc_device = {
@@ -268,8 +290,11 @@
.dma_mask = &udc_dmamask,
.coherent_dma_mask = 0xffffffff,
#if defined(CONFIG_MC13783_MXC) || defined(CONFIG_ISP1301_MXC)
+#ifndef CONFIG_MACH_MX31LITE /* Litekit does not use its MC13783 as a transceiver */
.platform_data = &mxc_serial_peripheral_config,
-#elif defined(CONFIG_ISP1504_MXC)
+#endif
+#endif
+#if defined(CONFIG_ISP1504_MXC)
.platform_data = &mxc_isp1504_config,
#endif
},
@@ -307,10 +332,13 @@
.usbmode = (u32) & UOG_USBMODE,
.power_budget = 150, /* 150 mA max power */
#if defined(CONFIG_MC13783_MXC)
+#ifndef CONFIG_MACH_MX31LITE /* Litekit does not use its MC13783 as a transceiver */
.gpio_usb_active = gpio_usbotg_fs_active,
.gpio_usb_inactive = gpio_usbotg_fs_inactive,
.transceiver = "mc13783",
-#elif defined(CONFIG_ISP1504_MXC)
+#endif
+#endif
+#if defined(CONFIG_ISP1504_MXC)
.gpio_usb_active = gpio_usbotg_hs_active,
.gpio_usb_inactive = gpio_usbotg_hs_inactive,
.transceiver = "isp1504",
@@ -335,10 +363,12 @@
{
pr_debug("%s: \n", __FUNCTION__);

+#ifndef CONFIG_MACH_MX31LITE /* USBH1 not supported on litekit */
#ifdef CONFIG_USB_EHCI_ARC_H1
host_pdev_register(usbh1_resources, ARRAY_SIZE(usbh1_resources),
&usbh1_config);
#endif
+#endif

#ifdef CONFIG_USB_EHCI_ARC_H2
host_pdev_register(usbh2_resources, ARRAY_SIZE(usbh2_resources),
@@ -347,9 +377,12 @@

#ifdef CONFIG_USB_EHCI_ARC_OTG
#if defined(CONFIG_MC13783_MXC) || defined(CONFIG_ISP1301_MXC)
+#ifndef CONFIG_MACH_MX31LITE /* Litekit does not use its MC13783 as a transceiver */
host_pdev_register(otg_resources, ARRAY_SIZE(otg_resources),
&mxc_serial_host_config);
-#elif defined(CONFIG_ISP1504_MXC)
+#endif
+#endif
+#if defined(CONFIG_ISP1504_MXC)
host_pdev_register(otg_resources, ARRAY_SIZE(otg_resources),
&mxc_isp1504_config);
#endif
diff -Naur PDK_BSP_R13.baseline/rpm/BUILD/linux/drivers/otg/hardware/Kconfig-imx31ads PDK_BSP_R13/rpm/BUILD/linux/drivers/otg/hardware/Kconfig-imx31ads
--- PDK_BSP_R13.baseline/rpm/BUILD/linux/drivers/otg/hardware/Kconfig-imx31ads 2008-08-18 15:43:26.000000000 -0700
+++ PDK_BSP_R13/rpm/BUILD/linux/drivers/otg/hardware/Kconfig-imx31ads 2008-08-26 06:58:24.000000000 -0700
@@ -19,7 +19,7 @@

config OTG_IMX31ADS
tristate "Freescale iMX31ADS Evaluation Board"
- depends on OTG && (MACH_MX31ADS)
+ depends on OTG && (MACH_MX31ADS || MACH_MX31LITE)

---help---
This implements On-The-Go USB Support for the iMX31ADS EVB.

BASE=$(cd "$(dirname `echo $0`)";pwd)

sudo /sbin/ifconfig eth1 192.168.3.1
MY_IP=`/sbin/ifconfig eth1|sed -n -e 's/.*inet addr:\([^ ]*\).*/\1/p'`
THE_MASK=`/sbin/ifconfig eth1|sed -n -e 's/.*Mask:\([^ ]*\).*/\1/p'`
THE_IP=192.168.3.31
THE_GATEWAY=192.168.3.1
THE_TTY=/dev/ttyS0

ARM_BIN=/opt/freescale/usr/local/gcc-4.1.2-glibc-2.5-nptl-3/arm-none-linux-gnueabi/bin

LTIB=$BASE/ltib
DOWN=$BASE/downloads
LOG=$BASE/log
ROOT=$BASE/tftpboot

echo "$(date +'%H:%M:%S') ==== sudo needed for subsequent actions ===="
sudo -v

echo "$(date +'%H:%M:%S') ==== Making Second Stage Bootloader ===="
tar -xf $DOWN/bootloader.tar.gz
( cd bootloader
cp Makefile Makefile.orig
cp bootloaderstg2.c bootloaderstg2.c.orig
sed -i -e 's+^CC=+CC='"$ARM_BIN"'/+' Makefile
sed -i -e 's+^LD=+LD='"$ARM_BIN"'/+' Makefile
sed -i -e 's+^AS=+AS='"$ARM_BIN"'/+' Makefile
sed -i -e 's+^LIBGCC=.*+LIBGCC=/opt/freescale/usr/local/gcc-4.1.2-glibc-2.5-nptl-3/arm-none-linux-gnueabi/arm-none-linux-gnueabi/sysroot/usr/lib+' Makefile
sed -i -e 's+#define COMMAND_LINE[^_].*+#define COMMAND_LINE "console=ttymxc0 root=/dev/nfs nfsroot='"$MY_IP:"'/tftpboot/rootfs rw init=/linuxrc ip='"$THE_IP::$THE_GATEWAY:$THE_MASK"' noalign"+' bootloaderstg2.c
make loader > $LOG/make-bootloader.log 2>&1
)

echo "$(date +'%H:%M:%S') ==== Preparing network publish ===="
ln -s $BASE/bootloader/loader $ROOT/loader
ln -s $LTIB/rootfs $ROOT/rootfs
( cd "$LTIB/rootfs/boot"
for i in *; do
ln -s "$LTIB/rootfs/boot/$i" "$ROOT/$i"
done
)
cp $LTIB/rootfs/boot/bootable_kernel /tftpboot/bootable_kernel
cp $LTIB/rootfs/boot/linux.config /tftpboot/linux.config
cp $BASE/bootloader/loader /tftpboot/loader
cp $LTIB/rootfs/boot/System.map /tftpboot/System.map
cp $LTIB/rootfs/boot/vmlinux /tftpboot/vmlinux
cp $LTIB/rootfs/boot/zImage /tftpboot/zImage
cp -r $ROOT/rootfs /tftpboot

echo "$(date +'%H:%M:%S') ==== Preparing LITEKIT board ===="
echo "=================================================================="
echo " Connect the LITEKIT board to $THE_TTY"
echo "=================================================================="
read -p "Hit return when ready: "
echo "=================================================================="

cat > kick.sh <<EOF
KICK=\`$ARM_BIN/arm-none-linux-gnueabi-objdump -t bootloader/loader|sed -n -e 's/\([0-9a-f]*\).* main/\1/p'\`
START_Z=0x81000000
LEN=\`cat $LTIB/rootfs/boot/zImage|wc -c\`

for i in \\
"('ifconfig sm0 $THE_IP $THE_MASK $THE_GATEWAY' 12)" \\
"('load elf /tftp/$MY_IP:loader' 3)" \\
"('load raw \$START_Z \$LEN /tftp/$MY_IP:zImage' 5)" \\
"('exec 0x\$KICK -' 0)" \\
; do
eval "i=\$i"
cmd="\${i[0]}"
slp="\${i[1]}"
echo "\$cmd"
echo "\$cmd" > $THE_TTY
sleep \$slp
done
EOF
chmod +x kick.sh
sudo ./kick.sh

echo "possibly zap the root password from rootfs/etc/shadow"

|_ bootloader
|_ downloads
| |_ bootloader.tar.gz
|_ log
|_ ltib
|_ tftpboot

eth0: SMSC911x/921x identified at 0xc485e000, IRQ: 90
IP-Config: Failed to open eth0
IP-Config: No network devices available.

CONFIG_REGULATOR_MC13783=y

# CONFIG_REGULATOR_MC13783 is not set

$ patch -p1 --verbose < SSC-PAC__LTIB-PDK-R13__LINUX-2-6-24__LITEKIT__20080826104107.patch
Hmm... Looks like a unified diff to me...
The text leading up to this was:
--------------------------
|diff -Naur PDK_BSP_R13.baseline/.config PDK_BSP_R13/.config
|--- PDK_BSP_R13.baseline/.config 2008-08-18 15:42:59.000000000 -0700
|+++ PDK_BSP_R13/.config 2008-08-26 06:58:24.000000000 -0700
--------------------------
Patching file .config using Plan A...
patch: **** malformed patch at line 5: # CONFIG_PLATFORM_imx21ads is not set