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Last Post 16 Mar 2018 11:32 AM by Adam Ford

ltib custom toolchain

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Jared

New Member
Posts:19

20 Feb 2015 10:24 AM
Hi Adam, Thank you for all your help and support. Your benchmark numbers look good. The memory timings (if deemed valid over full temperature range) will improve the results even more. In my tests with L2EN enabled, I found that for very small array sizes L1NEON marginally or slightly helps. However, for large array sizes L1NEON seems to significantly slower performance. This particular setting may be application specific, but I would recommend not setting the L1NEON with L2 cache enabled. Sincerely, -Jared

Adam Ford

Advanced Member
Posts:794

20 Feb 2015 10:53 AM
I am glad it worked out. Once you guys noticed it was L2 cache related, since I ran into a wall before. That gave me some different options and things to test. I have created a ticket in our bug tracking system and this whole conversation has spawned internal conversations, so I'll come back with updates as I get them. If you find other issues like that, let me know and I will work with you as best as I can. adam

Adam Ford

Advanced Member
Posts:794

24 Feb 2015 04:03 PM
Do you guys have a link to where you got the spreadsheet you used for calculating the timings? I'd like to review it if you don't mind. I went looking for such a document and I didn't see one on TI's site. A colleague of mine also looking around for bit, but he couldn't find anything either. I am running into resistance to wanting to change the timings, so I wanted to independently review it all. Thanks adam

Jared

New Member
Posts:19

24 Feb 2015 04:17 PM
Hi Adam, I am having trouble finding the link, but I still have the TI spreadsheet. My email address is in my profile. If you send me an email, I'll reply with it as an attachment. -Jared

Jared

New Member
Posts:19

24 Feb 2015 04:22 PM
Hi Adam, I found it. It is under AM37XX, but it is the same for OMAP35XX and DM37XX. The link is: http://processors.wiki.ti...AM37x_SDRC_registers halfway down the page there is the file: OMAP35x/AM/DM37x DDR register calc tool -Jared

Adam Ford

Advanced Member
Posts:794

25 Feb 2015 06:47 AM
Thank you very much. adam

Adam Ford

Advanced Member
Posts:794

26 Feb 2015 08:16 AM
I went through the spreadsheet, and I concur with your findings. I loaded them into my board and the 1GHz board showed a 1-6% improvement in performance with the L2 Cache enabled. I will run some temperature testing to look at stability over the range of temperatures. I am going to be out of the office for a few days, but when I return, I'll try to get some testing in and I'll let you know my findings. I have passed this information along to the developers for further review. adam

Sergey Brandis

New Member
Posts:79

16 Mar 2018 03:27 AM
Could you please describe modifications you did to build kernel 3.0.101 with CodeSourcery 2014.05? I'm now facing issue when trying to build kernel that way: it can't boot. Everything stops here: bootm 0x81000000 ## Booting kernel from Legacy Image at 81000000 ... Image Name: Linux-3.0.101-BSP-dm37x-2.4-4 Image Type: ARM Linux Kernel Image (uncompressed) Data Size: 3756164 Bytes = 3.6 MiB Load Address: 80008000 Entry Point: 80008000 Verifying Checksum ... OK Loading Kernel Image ... OK OK setup_product_id_tag: Huh? Can't find product ID data Starting kernel ... My bootargs are (I'm booting from nand after "run makeyaffsboot"): == Kernel bootargs == nand-ecc=chip console=ttyO0,115200n8 display=28 ignore_loglevel early_printk no_console_suspend mtdparts=omap2-nand.0:512k(x-loader),1664k(u-boot),384k(u-boot-env),5m(kernel),20m(ramdisk),-(fs) root=/dev/mtdblock5 rw rootfstype=yaffs2

Sergey Brandis

New Member
Posts:79

16 Mar 2018 03:46 AM
I forgot to mention my compiller flags: -O2 -fsigned-char -march=armv7-a -mtune=cortex-a8 -mfpu=neon -ftree-vectorize -ffast-math -mfloat-abi=softfp

Sergey Brandis

New Member
Posts:79

16 Mar 2018 11:11 AM
Sorry, I hurried a little bit. Issue was in combination of Linux 3.0.x kernel and GCC 4.8+. GCC to aggressively optimises some parts of kernel. I changed file arch/arm/lib/memset.S according to latest commits for kernel 3.10.x and everything booted up successfully. Anyway thanks Commits: 1) https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git/commit/arch/arm/lib/memset.S?id=455bd4c430b0c0a361f38e8658a0d6cb469942b5 2) https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git/commit/arch/arm/lib/memset.S?id=418df63adac56841ef6b0f1fcf435bc64d4ed177

Adam Ford

Advanced Member
Posts:794

16 Mar 2018 11:32 AM
That is good news, because I was going to suggest that we haven't tested any of the new compilers and found some of the newer compilers don't. I am glad you were able to work through it. (you beat me to the punch) Thanks for posting a fix, so we at least have it documented for future reference. adam

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