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Last Post 04 Aug 2007 01:04 AM by  osa@elara.ru
SHARP LH79525 & SAMSUNG K9F1G08U0A
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osa@elara.ru
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--
30 Jul 2007 06:20 AM
    Hello, LOGICPD!
    ==========

    With standart configuration of [LH79524 Zoom Starter Development Kit] in SEGGER JTAG SOFTWARE used following initialization of CPU SHARP LH79524 and flash SHARP LH28F128SPHTD-PTL12.
    ========================================================
    01) Action "Reset @startup" by address [0x00000000] write value [0x00000000].

    02) Action "Enable APB register write access" by address [0xFFFE2000] write value [0x00000260].

    03) Action "Set Chip in fastbus mode" by address [0xFFFE2088] write value [0x00000001].

    04) Action "Disable Periphal clock for Ethernet, USB, LCD" by address [0xFFFE202C] write value [0x0000001C].

    05) Action "Disable Periphal clock UART0,UART1,UART2,RTC" by address [0xFFFE2024] write value [0x00000207].

    06) Action "Disable periphal clock for LCD,SSP,ADC,USB" by address [0xFFFE2028] wite value [0x0000000F].

    07) Action "Set System PLL to 101,6064 MHz" by address [0xFFFE20C0] write value [0x00003049].

    08) Action "Delay" by address [0x00000000] write value [0x00000028].

    09) Action "Set HCLK to 50,8032 MHz" by address [0xFFFE2018] write value [0x00000001].

    10) Action "Set FCLK to 50,8032 MHz" by address [0xFFFE201C] write value [0x00000001].

    11) Action "Set clock to async clock mode" by address [0xFFFE2088] write value [0x00000001].
    /* i'm not sure this is correct, because in [Core Clock Configuration Register] Bits 1:0 means: with value 00 -> standart mode, asynchronous operation; with value 01 -> fastBus extansion mode */

    12) Action "Enable external memory controller" by address [0xFFFF1000] write value [0x00000001].

    13) Action "Setup Pins to Signal D8,D16" by address [0xFFFE5058] write value [0x00005000].

    14) Action "Setup Pins to Signal D9,D10,D11,D12,D17,D18,D19,D20" by address [0xFFFE5050] write value [0x00005555].

    15) Action "Setup Pins to D13,D14,D15,D21,D22,D23,D24,D25" by address [FFFE5048] write value [0x00005555].

    16) Action "Setup Pins to Signal D26,D27,D28" by address [0xFFFE5098] write value [0x00001110].

    17) Action "Setup Pins to Singal D29,D30,D31" by address [0xFFFE5090] write value [0x00000441].

    18) Action "Setup Pins to Singal A16,A17,A18,A19,A20,A21,A22,A23" by address [0xFFFE5030] write value [0x00005555].

    19) Action "Setup CS1 (Flash); 16bit, BLE = 1" by address [0xFFFF1220] write value [0x00000081].

    20) Action "Setup CS1 (Flash); Write Enable Delay = 1" by address [0xFFFF1224] write value [0x00000001].

    21) Action "Setup CS1 (Flash); Output Enable Delay = 1" by address [0xFFFF1228] write value [0x00000001].

    22) Action "Setup CS1 (Flash); Read Delay Register = 6 (Wait 6 + 1 HClk cycles)" by address [0xFFFF122C] write value [0x00000006].

    23) Action "Setup CS1 (Flash); Page mode read delay = 2 (2 + 1 HClk cycles)" by address [0xFFFF1230] write value [0x00000002].

    24) Action "Setup CS1 (Flash); Write delay = 6" by address [0xFFFF1234] write value [0x00000006].

    25) Action "Setup CS1 (Flash); Memory Turn around Delay = 2 (2 + 1 HClk Cycles)" by address [0xFFFF1238] write value [0x00000002].

    26) Action "Setup CS3 (CPLD) 16bit, BLE = 1" by address [0xFFFF1260] write value [0x00000081].

    27) Action "Setup CS3 (CPLD) Write Enable Delay = 2" by address [0xFFFF1264] write value [0x00000002].

    28) Action "Setup CS3 (CPLD) Output Enable Delay = 2" by address [0xFFFF1268] write value [0x00000002].

    29) Action "Setup CS3 (CPLD) Read Delay Register = 5 (Wait 5 + 1 HClk cycles)" by address [0xFFFF126C] write value [0x00000005].

    30) Action "Setup CS3 (CPLD) Page mode read delay = 2 (2 + 1 HClk cycles)" by address [0xFFFF1270] write value [0x00000002].

    31) Action "Setup CS3 (CPLD) Write delay = 5" by address [0xFFFF1274] write value [0x00000005].

    32) Action "Setup CS3 (CPLD) Memory Turn around Delay = 2 (2 + 1 HClk Cycles)" by address [0xFFFF1278] write value [0x00000002].

    33) Action "Enable Flash write enable" by address [0x4C800000] write value [0x0000000].
    ===========================================================

    We are purchased LH79524 Zoom Starter Development Kit and hope for your support.

    Our team developing device based on CPU SHARP LH79525 + Flash SAMSUNG K9F1G08U0A:
    - In device scheme portC bits 4:7 (contacts A20:A23) configured to value 0x5h (boot from NAND, 8 bit address, 4 byte).
    - In device scheme nSC0 is set to 1 and nCS1 is not set.

    Does CPU SHARP LH79525 support NAND flash SAMSUNG K9F1G08U0A ?
    * flash datasheet avaible by this url: (http://www.datasheets.org...php?article=1880647)

    If, yes:
    ====
    Please help us to initialize CPU SHARP LH79525 + Flash SAMSUNG
    K9F1G08U0A as was written before for CPU SHARP LH79524 and flash SHARP LH28F128SPHTD-PTL12.

    If, No:
    ====
    Please advise us what type of flash to use, where to buy (how much), how to configure initialization.
    * Our need in > 64 MB flash memory (NOR or NAND).

    with best regards and
    big hope for your support.
    osa@elara.ru
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    --
    04 Aug 2007 01:04 AM
    oh, thanx, we're found the way.. but seems it doesn't work without cpld.
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