The LH79524 processor and development kit both support external 32bit memory interface.

-Kurt

I want to make this clear. I didn't say memory. Yes I know they support that for mem access, SDRAM, but what about other custom external static devices that I want to talk to. I would assign it to a different arbitration index on the external bus controller.

According to what you show on page 22, only 16 or 8 bit access is permitted on CS0,CS1,CS2,CS3 in the external static memory address region. If I understand this chart.

I just want to be clear on this. Example, the Atmel AT91RM9200 only allows 16 bit access on external static devices. I've run into this before.

cstrahm,
I am not sure what document you are referring to when you say "page 22." however, the chip does support static and synchronous 32 bit accesses.
Stolen from the Sharp Users manual page 216:
• 8-bit and 16-bit wide static memory support (32-bit support in the LH79524)
• 16-bit wide synchronous SDRAM memory support (32-bit support in the LH79524)

I have provided the link directly to the data sheet so you can read it for yourself.
http://document.sharpsma....4A858C6FF9440469CFD0

-Kurt

Your doc 1000983_Rev_C.pdf, page 22.

Yes I agree, the MCU datasheet indicates that it does. Put that doesn't automatically mean that your eval brd has brought out all of those 32 pins on some connector for external interface. What I saw on page 22 concerns me, but maybe it is talking about something different. I do not know. I have not seen a schematic of your brd yet. That's why I am asking.

Page 22 has a not that says banks 1,2 are 32 bit, and then the chart says 16. So it is confusing.

Chris.

cstrahm,
All 32 data bits go off of the development kit directly to .100" headers.

Good luck with your application.
-Kurt