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Last Post 11 Jun 2004 03:02 PM by  Anonymous
Lolo and Threadx
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jmcclin2
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10 Jun 2004 05:24 PM
    Hi, I want to run Threadx app on the evaluation board in SDRAM; how can encapsulate the interrupts and exceptions for ThreadX if Lolo is down at location 0 where my interrupt/exception table should be? (Or am I missing something here?). All of the low-level threadX code that I have seen requires you to 'route' the interrupts and exceptions through Threadx so that it can save/restore the context properly.

    Any insight would be great, thanks,

    Jeremy
    Anonymous
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    11 Jun 2004 03:02 PM
    You don't run ThreadX on top of LoLo. Instead, when ThreadX starts, you copy the exception and interrupt handlers over LoLo. On the 9520 the exception vector address is always located at address 0. So you can either copy over LoLo's vectors located in sdram, or setup his memory map to have another area (say internal sram) be located at address 0 and put his vectors there. I just wanted to make it clear that he cannot put the vectors at some arbitrary location and then set a register to point there, they have to be wherever he has mapped address 0 to be.

    Aaron Stewart
    Technical Support Engineer
    Logic Product Development
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