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Last Post 03 Jul 2003 08:12 PM by  elf-coastal@buici.com
Why no reset signal on JTAG header?
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elf-coastal@buici.com
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25 Jun 2003 01:39 PM
    According to the the documentation provided by Abatron, a vendor of JTAG emulators, ping 12 on the JTAG connector is supposed to be connected to a !RESET signal on the target. This allows the JTAG emulator perform a hard reset of the target.

    According to available schematics, this pin is tied to 3.3v via a pull-up resistor.

    The lack of this feature tends to make debugging difficult. Is there a compelling reson for the omission?
    Anonymous
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    27 Jun 2003 03:10 PM
    Marc,

    The JTAG signals were designed according to the Macraigor Wiggler/Raven and Muiti-Ice JTAG reference designs, not to the Abatron.

    regards,

    Andrew
    elf-coastal@buici.com
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    03 Jul 2003 08:12 PM
    It looks like the JTAG pinouts come from the CPU manufacturer.

    I've read that there is no convention specified in the JTAG standard. And, there is mention in the Sharp documentation for the EVB about recommendations from ARM Ltd about a proper JTAG pinout.
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