Search

Technical Discussion Group Forum

This forum is provided for user discussion. While Beacon EmbeddedWorks support staff and engineers participate, Beacon EmbeddedWorks does not guarantee the accuracy of all information within in the Technical Discussion Group (TDG).

The "Articles" forums provide brief Articles written by Beacon EmbeddedWorks engineers that address the most frequently asked technical questions.

To receive email notifications when updates are posted for a Beacon EmbeddedWorks product download, please subscribe to the TDG Forum of interest.

TDG Forum

PrevPrev Go to previous topic
NextNext Go to next topic
Last Post 17 Nov 2005 01:58 PM by  Anonymous
REQ: BDI file
 1 Replies
Sort:
You are not authorized to post a reply.
Author Messages
eflum
New Member
New Member
Posts:


--
15 Nov 2005 02:41 PM
    I've been told you guys at LogicPD like to use the BDI2000. Can you guys provide a .bdi setup file?

    Thanks.
    Anonymous
    Posts:


    --
    17 Nov 2005 01:58 PM
    Hello,

    Below is an example configuration file. I can't guarantee the accuracy of the values, you will want to double check this since I haven't personally used the BDI2000 JTAG.

    Thanks,



    ; LH7A400.cfg for Abatron BDI2000
    ; ----------------------------------------------------------------
    ;

    [HOST]
    IP 192.168.111.3
    ;LOAD AUTO
    LOAD MANUAL
    FILE wblob.bin

    FORMAT BIN 0xb0000000
    ;START 0xb0000000


    [INIT]
    ; Friendliness for GDB, a stack frame
    WGPR 11 0xb0013ff0
    WM32 0xb0013ff0 0x28

    WM32 0x80002000 0x200041c0 ; Controller settings for SRAM Bank 0 (32bit)
    WM32 0x8000201c 0x1000b2c2 ; 16 bit access to CPLD
    WM8 0x70200000 0x00 ; Enable WLAN, disable LCD
    WM8 0x71000000 0x01 ; Flash programing enable, VPEN
    WM8 0x71A00000 0x02 ; GPIO Direction Register


    [TARGET]
    CPUTYPE ARM920T
    CLOCK 1 ;JTAG clock (0=Adaptive, 1=8MHz, 2=4MHz, 3=2MHz)
    ENDIAN LITTLE ;memory model (LITTLE | BIG)
    ;VECTOR CATCH ;catch unhandled exceptions
    ;VECTOR CATCH 0x1f
    ;BREAKMODE SOFT 0xDFFFDFFF ;SOFT or HARD, ARM / Thumb break code
    BREAKMODE HARD ;SOFT or HARD, ARM / Thumb break code

    ;RESET NONE
    ;STARTUP RUN

    RESET HARD
    ;WAKEUP 500
    STARTUP RESET

    ; TRST PUSHPULL

    [FLASH]
    WORKSPACE 0xB0010000 ;workspace in target SRAM for fast algorithm

    ;; for SDK
    ;;CHIPTYPE STRATAX16
    ;;CHIPSIZE 0x00800000
    ;;BUSWIDTH 32

    ;; for IDK
    CHIPTYPE STRATAX16
    CHIPSIZE 0x00800000
    BUSWIDTH 32

    ;;I28BX16
    ;;STRATAX16

    ;;AM29BX16
    ;;AM29DX16
    ;;AM29DX32
    ;;AT49X16
    ;;M58X32
    ;;AT49X16
    ;;MIRRORX16

    ;; size
    ;; bus
    You are not authorized to post a reply.