lucb,
Using 0xc00 as the "prot" parameter should work just fine. The "prot" parameter defines what type of accesses are allowed. Read the section on the MMU in any ARM-9 user guide to understand more. Basically, you can have read and write access to which you can add cache or bufferable accesses.
When you use the remap command at the Losh shell, unless you specify 'c', you are just getting read and write access. That is to say, the area being mapped in will not use the cache or the write buffer. By your previous post, it doesn't look like you are adding this argument, thus 0xc00 should be what you want.
One thing that you need to watch out for is that you will need to flush both the cache and the translation lookaside buffer after you do a remap. This is, of course, because you just changed the page tables and the MMU will get confused if you don't as it will be out of sync.
Something like this
should work for you:
cpu_remap(0x63000000, 0x63000000, 0x200000, 0xc00);
cpu_cache_flush();
cpu_tlb_flush();
LoLo has a function named "cpu_tlb_flush()" that it calls but, unfortunately, that isn't exported via our API. So, you will have to implement it yourself. The following code should work. Note, this uses GCC's inline assembly syntax. If you don't understand it, just translate it to straight ARM assembly and go with it.
void
cpu_tlb_flush(void)
{
unsigned int tmp = 0;
/* Invalidate the entire TLB. */
asm volatile("mcr p15, 0, %0, c8, c7, 0" : : "r"(tmp) );
asm volatile ("nop");
asm volatile ("nop");
asm volatile ("nop");
asm volatile ("nop");
asm volatile ("nop");
}
Please let me know if this works for you.
Regards,
--mikee