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Last Post 20 Jan 2005 01:09 PM by  mikee@logicpd.com
use of remap in Lolo API
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lucb
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--
11 Jan 2005 02:04 AM
    I am trying to validate the MMU for the locations from
    0x63000000 for a length of 0x200000 (2MB)
    It works when I type
    losh>remap 0x63000000 0x63000000 0x200000

    but I am trying to put this into my code using the Lolo API.
    The remap call is not too well documented. I am trying to figure what values to use for the last parameter:

    void cpu_remap ( u_int paddr,
    u_int vaddr,
    u_int len,
    u_int prot
    )

    The cpu_remap() function remaps physical addresses to virtual addresses of size len with access setting prot.
    What do I need to set prot to?
    I tried 0, 1, 2, 3,4 0xFFFFFFFF,0x00FF, 0x00FFFF,0x00FFFE no luck.

    any clue?
    Thanks
    Luc
    Anonymous
    Posts:


    --
    11 Jan 2005 02:11 PM
    You should be able to use these bitfield definitions:

    #define ARM_MMU_BUFF (0x00000004)
    #define ARM_MMU_CACHE (0x00000008)
    #define ARM_MMU_ACCESS_RW (0x00000c00)
    lucb
    New Member
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    Posts:


    --
    13 Jan 2005 03:10 AM
    I tried 0x0C00 but that did not work any better...
    Luc
    Anonymous
    Posts:


    --
    18 Jan 2005 12:00 PM
    Luc,

    You must map this memory in. LogicLoader does not map this memory location, since it is off board memory. This is simply done with the 'remap'
    command.

    usage:
    remap <phys> <virt> <length> [c]
    remap 1M chunks of mem from phys to virt for length, [c]ached
    example: remap 0x72000000 0x72000000 0x200000

    For example:
    remap 0x63000000 0x63000000 0x20000


    Regards,
    lucb
    New Member
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    Posts:


    --
    18 Jan 2005 12:07 PM
    Yes I know the manual way works. Thanks.
    I am trying to have this in my C code that uses the Lolo API, so I don't have to enter that remap everytime I boot.
    mikee@logicpd.com
    New Member
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    Posts:


    --
    18 Jan 2005 01:27 PM
    lucb,

    Using 0xc00 as the "prot" parameter should work just fine. The "prot" parameter defines what type of accesses are allowed. Read the section on the MMU in any ARM-9 user guide to understand more. Basically, you can have read and write access to which you can add cache or bufferable accesses.

    When you use the remap command at the Losh shell, unless you specify 'c', you are just getting read and write access. That is to say, the area being mapped in will not use the cache or the write buffer. By your previous post, it doesn't look like you are adding this argument, thus 0xc00 should be what you want.

    One thing that you need to watch out for is that you will need to flush both the cache and the translation lookaside buffer after you do a remap. This is, of course, because you just changed the page tables and the MMU will get confused if you don't as it will be out of sync.

    Something like this should work for you:


    cpu_remap(0x63000000, 0x63000000, 0x200000, 0xc00);
    cpu_cache_flush();
    cpu_tlb_flush();


    LoLo has a function named "cpu_tlb_flush()" that it calls but, unfortunately, that isn't exported via our API. So, you will have to implement it yourself. The following code should work. Note, this uses GCC's inline assembly syntax. If you don't understand it, just translate it to straight ARM assembly and go with it.


    void
    cpu_tlb_flush(void)
    {
    unsigned int tmp = 0;
    /* Invalidate the entire TLB. */
    asm volatile("mcr p15, 0, %0, c8, c7, 0" : : "r"(tmp) );
    asm volatile ("nop");
    asm volatile ("nop");
    asm volatile ("nop");
    asm volatile ("nop");
    asm volatile ("nop");
    }


    Please let me know if this works for you.

    Regards,
    --mikee
    lucb
    New Member
    New Member
    Posts:


    --
    19 Jan 2005 07:36 AM
    How do I get cpu_cache_flush()? it is defined in cpu.h, but which lib am I supposed to link against?
    thanks
    mikee@logicpd.com
    New Member
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    Posts:


    --
    19 Jan 2005 10:06 AM
    It is provided in the API. If you are linking to cpu_remap(), you should already be linking to cpu_cache_flush(). That is, unless it isn't included in that version of the API. If it isn't, you can easily write your own based on the information in the ARM-9 programmer's guide. Or, you can follow the code below:


    void
    cpu_cache_flush(void)
    {
    unsigned int seg;
    unsigned int line;
    unsigned int idx;

    /* invalidate & clean each line of the DCache */
    for ( seg = 0; seg < 4; seg++ )
    {
    for ( line = 0; line < 64; line++ )
    {
    idx = (seg << 5) | (line << 26);
    /* clean & invalidate */
    asm volatile ("mcr p15, 0, %0, c7, c14, 2" : : "r"(idx));
    /* drain write buffer */
    asm volatile ("mcr p15, 0, %0, c7, c10, 4" : : "r"(idx));
    }
    }

    /* invalidate the icache */
    asm volatile ("mcr p15, 0, %0, c7, c5, 0" : : "r"(idx) );

    /* NOPs to clean the pipeline. */
    asm volatile ("nop");
    asm volatile ("nop");
    asm volatile ("nop");
    asm volatile ("nop");
    asm volatile ("nop");
    asm volatile ("nop");

    return;
    }


    Regards,
    --mikee
    lucb
    New Member
    New Member
    Posts:


    --
    20 Jan 2005 01:00 PM
    And it works and solves the problem of accessing the low CS area under lolo!
    Thank you!
    mikee@logicpd.com
    New Member
    New Member
    Posts:


    --
    20 Jan 2005 01:09 PM
    My pleasure.

    I am just happy to be of help. Was cpu_cache_flush() included in the version of the API you are using, or did you use the above code?

    If it wasn't in the API library, please let me know what version of LoLo and the API you are using.

    Thanks,
    --mikee
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