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Last Post 21 Jul 2009 09:25 AM by  sandeep.akkanapragada@lntemsys.com
Config.bib changes
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sandeep.akkanapragada@lntemsys.com
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21 Jul 2009 09:25 AM
    Hi,
    We made a custom board for OMAP3530, we also developed a bootloader. but our memory model is a bit different to logicpd's SOM board.
    I made changes in config.bib,
    MEMORY
    ARGS 84000000 00001000 RESERVED ; 4K
    NK 84001000 06DFF000 RAMIMAGE ; 110MB - 4K
    DISPLAY 8B000000 01000000 RESERVED ; 16MB
    RAM 8C000000 08000000 RAM ; 128MB
    BRIDGE 8AE00000 00200000 RESERVED ; 2MB
    nk.exe:dwOEMFailPowerPaging 00000000 00000001 FIXUPVAR
    nk.exe:dwOEMDrWatsonSize 00000000 0004B000 FIXUPVAR
    nk.exe:dwOEMPRCMCLKSSetupTime 00000000 00000140 FIXUPVAR
    nk.exe:dwOEMPagingPoolSize 00000000 00200000 FIXUPVAR
    nk.exe:dwOEMTargetProject 00000000 00000001 FIXUPVAR
    nk.exe:dwOEMMPUContextRestore 00000000 80000800 FIXUPVAR
    ;-------------------------------------------------------------------------------

    CONFIG
    COMPRESSION=ON
    KERNELFIXUPS=ON
    FSRAMPERCENT=0x80808080

    ; NK (RAMIMAGE) and RAM (RAM) areas are not contiguous, turn off AUTOSIZE
    AUTOSIZE=OFF

    IF IMGPROFILER
    PROFILE=ON
    ELSE
    PROFILE=OFF
    ENDIF

    IF IMGFLASH
    ROMOFFSET=FC000000
    ENDIF

    ;
    ; ROMFLAGS is a bitmask of options for the kernel
    ; ROMFLAGS 0x0001 Disallow Paging
    ; ROMFLAGS 0x0002 Not all KMode
    ; ROMFLAGS 0x0010 Trust Module only
    ;
    IF IMGTRUSTROMONLY
    IF IMGNOTALLKMODE
    ROMFLAGS=12
    ELSE
    ROMFLAGS=10
    ENDIF
    ELSE
    IF IMGNOTALLKMODE
    ROMFLAGS=02
    ELSE
    ROMFLAGS=00
    ENDIF
    ENDIF

    ; Make an NB0 if ULDR is built
    IF IMGULDR
    ; make an NB0
    ROMSTART=84001000
    ROMSIZE=00400000
    ROMWIDTH=32
    ENDIF

    ;-------------------------------------------------------------------------------

    image_cfg.h file
    #ifndef __IMAGE_CFG_H
    #define __IMAGE_CFG_H

    //------------------------------------------------------------------------------
    //
    // Define: DEVICE_RAM/FLASH_xxx
    //
    // SDP3430 has 128MB SDRAM located at physical address 0x80000000.
    //
    #define DEVICE_RAM_PA 0x80000000
    #define DEVICE_RAM_CA 0x84000000
    #define DEVICE_RAM_SIZE 0x08000000

    #define DEVICE_CS0_PA 0x08000000
    #define DEVICE_CS1_PA 0x0C000000
    #define DEVICE_CS5_PA 0x15000000


    //------------------------------------------------------------------------------
    //
    // Define: IMAGE_SHARE_ARGS_xxx
    //
    // Following constants define location and maximal size of arguments shared
    // between loader and kernel. For actual structure see args.h file.
    //
    #define IMAGE_SHARE_ARGS_PA 0x80000000 // not on lpd som-lv -mt
    #define IMAGE_SHARE_ARGS_SIZE 0x00001000 // not on lpd som-lv -mt

    //------------------------------------------------------------------------------
    //
    // Define: IMAGE_WINCE_xxx
    //
    // Following constants define Windows CE OS image layout.
    //
    #define IMAGE_WINCE_CODE_PA 0x80001000
    #define IMAGE_WINCE_CODE_SIZE 0x02FFF000

    //------------------------------------------------------------------------------
    //
    // Define: IMAGE_BRIDGE_xxx
    // Following constants define location and size of Bridge shared memory
    //
    //#define IMAGE_BRIDGE_PA 0x87000000
    //#define IMAGE_BRIDGE_SIZE 0x00400000

    //------------------------------------------------------------------------------
    //
    // Define: IMAGE_CAMERA_BUF_xxx
    //
    // Following constants define location and size of the camera buffer
    //
    //#define IMAGE_CAMERA_BUF_PA 0x87400000
    //#define IMAGE_CAMBUFF_BUF_SIZE 0x00400000

    //------------------------------------------------------------------------------
    //
    // Define: IMAGE_DISPLAY_BUF_xxx
    //
    // Following constants define location and size of the display buffer
    //
    #define IMAGE_DISPLAY_BUF_PA 0x84800000
    #define IMAGE_DISPLAY_BUF_SIZE 0x01000000

    //------------------------------------------------------------------------------
    //
    // Define: IMAGE_STARTUP_xxx
    //
    // Jump address XLDR uses to bring-up the device.
    //
    #define IMAGE_STACK_PA 0x80001000
    #define IMAGE_STACK_SIZE 0x000FF000


    //------------------------------------------------------------------------------
    //
    // Define: IMAGE_BOOTLOADER_xxx
    //
    // Following constants define bootloader information
    //

    #define IMAGE_XLDR_BOOTSEC_NAND_SIZE 0x00020000 // Needs to be a multiple of 128k
    #define IMAGE_EBOOT_BOOTSEC_NAND_SIZE IMAGE_EBOOT_CODE_SIZE
    #define IMAGE_IPL_BOOTSEC_NAND_SIZE IMAGE_IPL_CODE_SIZE

    #define IMAGE_XLDR_BOOTSEC_ONENAND_SIZE 0x00020000 // Needs to be a multiple of 128k
    #define IMAGE_EBOOT_BOOTSEC_ONENAND_SIZE IMAGE_EBOOT_CODE_SIZE
    #define IMAGE_IPL_BOOTSEC_ONENAND_SIZE IMAGE_IPL_CODE_SIZE

    #define IMAGE_BOOTLOADER_BITMAP_SIZE 0x00040000 // Needs to be a multiple of 128k (QVGA)
    //#define IMAGE_BOOTLOADER_BITMAP_SIZE 0x00100000 // Needs to be a multiple of 128k (VGA)


    #define IMAGE_BOOTLOADER_NAND_SIZE (IMAGE_XLDR_BOOTSEC_NAND_SIZE + \
    IMAGE_EBOOT_BOOTSEC_NAND_SIZE + \
    IMAGE_BOOTLOADER_BITMAP_SIZE)

    #define IMAGE_BOOTLOADER_ONENAND_SIZE (IMAGE_XLDR_BOOTSEC_ONENAND_SIZE + \
    IMAGE_EBOOT_BOOTSEC_ONENAND_SIZE + \
    IMAGE_BOOTLOADER_BITMAP_SIZE)


    //------------------------------------------------------------------------------

    #endif
    addrtab_cfg.inc file:
    ;------------------------------------------------------------------------------
    ; Export Definition

    EXPORT g_oalAddressTable[DATA]

    ;------------------------------------------------------------------------------
    ; Table format: cached address, physical address, size

    ALIGN 4
    g_oalAddressTable
    DCD 0x84000000, 0x80000000, 128 ; SDRAM
    DCD 0x8C000000, 0xA0000000, 128 ; SDRAM
    DCD 0x94000000, 0x0C000000, 16 ; CS0, OneNand/Nand flash
    DCD 0x95000000, 0x15000000, 16 ; CS5, LAN9115
    DCD 0x96000000, 0x48000000, 16 ; L4 Core/Wakeup registers
    DCD 0x97000000, 0x49000000, 1 ; L4 Peripheral
    DCD 0x97100000, 0x68000000, 16 ; L3 registers
    DCD 0x98100000, 0x6C000000, 16 ; SMS registers
    DCD 0x99100000, 0x6D000000, 16 ; SDRC registers
    DCD 0x9a100000, 0x6E000000, 16 ; GPMC registers
    DCD 0x9b100000, 0x40200000, 1 ; 62KB SRAM
    DCD 0x9b200000, 0x5C000000, 16 ; L3 interconnect
    DCD 0x00000000, 0x00000000, 0 ; end of table

    ;------------------------------------------------------------------------------

    END

    the eboot is executing properly executing, copying the file, and jumping to 0x8400B010, but no more debug messages are coming, i changed the debug.c file for UART3 as our custom board uses uart3 for debug, and I also made changes in platform.c file. the nk.map file some portion included below
    ......
    0001:00008e60 ??_C@_1GM@PDLDOEEM@?$AA?$CL?$AAB?$AAS?$AAP?$AAI?$AAn?$AAt?$AAr?$AAR?$AAe?$AAq?$AAu?$AAe?$AAs?$AAt?$AAI?$AAr?$AAq?$AA?$CI?$AA0?$AAx?$AA?$CF?$AA0?$AA8?$AAx?$AA?9?$AA?$DO?$AA?$CF?$AAd?$AA?1?$AA?$CF?$AAd@ 00019e60 oal:intr.obj
    0001:00009010 StartUp 0001a010 f oal:startup.obj
    0001:00009114 g_oalAddressTable 0001a114 oal:startup.obj
    0001:000091b0 _copy_boot_args 0001a1b0 f oal:startup.obj
    0001:000091d4 _lpd_enable_l1_i_cache 0001a1d4 f oal:startup.obj
    0001:000091ec _lpd_enable_l1_d_cache 0001a1ec f oal:startup.obj
    0001:00009204 _lpd_invalidate_l2_cache 0001a204 f oal:startup.obj
    0001:000092....
    ...
    so please suggest me where else I need to make changes for properly executing the NK.bin.?

    Thanks in Advance,
    Sandy.


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