I'm struggling with the interrupt from the LAN controller.
The first interrupt always occours but the line from CPLD to the processor keeps set to low. All interrupt bits in the CPLD mask register are set which means that there is no pending interrupt. Only WLAN is enable (no other interrupt source). The interrupt line only raise to high when the global interrupt disable bit in the CPLD card engine control register is set.
As soon as this will be cleared then the interrupt line goes to LOW, even if no Touch or WLAN interrupt is pending.
The CPLD software version is 0x34 type b. So I configured PortF3 for GPIO CPLD interrupt.

Any hints?
Thanks.

Toralf